UT699CPC datasheet(26/41 Pages) AEROFLEX

部件名	UT699CPC

功能描述	UT699 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor

PDF	41 Pages

Scroll/Zoom	100%

制造商	AEROFLEX [Aeroflex Circuit Technology]

网页	http://www.aeroflex.com

标志

26 / 41 page

Figure 5. Memory Interface, ERROR, and WDOG Output Timing Diagram

4.3 Input Timing Characteristics for Memory Interface

(VDD = 3.3V + 0.3V; VDDC = 2.5V + 0.2V; TC = -40

oC to 105oC)

Notes:

1. CB[7] is not used for EDAC and is not tested

2. Guaranteed by design.

Figure 6. Memory Interface Input Timing Diagram

Symbol

Description

Min

Max

Units

t51

Setup time to SDCLK

(DATA[31:0], CB[6:0], BEXC, and synchronous BRDY)

t61

Hold time from SDCLK

(DATA[31:0], CB[6:0], BEXC, and synchronous BRDY)

t72

Asynchronous BRDY pulse width

1.5

tCLK

SDCLK

All Outputs

DATA[31:0] and CB[7:0]

ERROR and WDOG

(Except Bi-Directs

and Open-Drains)

WRITE and RWE[3:0]

(Bi-Direct Outputs)

(Open-Drain Outputs)

SDCLK

All Inputs

Asynchronous BRDY

(Except Async BRDY)

UT699CPC 数据表(PDF) 26 Page - Aeroflex Circuit Technology

UT699CPC 数据表(HTML) 26 Page - Aeroflex Circuit Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

数据表下载