Data Sheet

ADA8282

Rev. 0 | Page 11 of 21

THEORY OF OPERATION

RADAR RECEIVE PATH AFE

The primary application for the ADA8282 is a high speed ramp,

frequency modulated, continuous wave radar (HSR-FMCW radar).

Figure 25 shows a simplified block diagram of an HSR-FMCW

radar system. The signal chain requires multiple channels, each

including an LNA and a PGA. The ADA8282 provides these key

components in a single 5 mm × 5 mm LFCSP.

The performance of each component is designed to meet the

demands of an HSR-FMCW radar system. Some examples of

these performance metrics are the LNA noise, PGA gain range,

and signal chain bandwidth and power. The ADA8282 also has

adjustable power modes to adjust the power and performance

level to accommodate a wide variety of applications.

The ADA8282 is programmable via the SPI. Channel gain,

power mode, and offset voltage can be adjusted using the SPI port.

DEFAULT SPI SETTINGS

When initially powered, the ADA8282 defaults to a setting of

0x00 in Register 0x17, which disables all channels. The device is

enabled by writing 0x0F to Register 0x17.

INPUT IMPEDANCE

The input impedance to the ADA8282 is set by an internal 785 Ω

resistance at each input, biased to midsupply by an internal voltage

buffer. Both the positive and negative inputs are biased with the

same network, creating a differential input impedance of 1.57 kΩ.

The input to the ADA8282 is typically ac-coupled. The ac

coupling capacitors operate with the input impedance of the

ADA8282 to create a high-pass filter with a pole at 1/(2π2RC),

where R = 785 Ω with a typical tolerance of ±15%.

POWER MODES

The ADA8282 has four power modes that can be controlled

through Register 0x14 (BIAS_SEL). The power modes allow a

user to adjust the power and performance tradeoffs to suit the end

application. Use the low power mode when power savings are in

demand, and use the high power mode in applications that

require increased bandwidth and low noise.

Table 6 shows the power performance trade-offs of the various

SPI settings.

Table 6. Power Mode Trade-Offs

Mode

Setting

Power per

Channel

(mW)

Input Referred

Noise at 2 MHz

(nV/√Hz)

Typical Bandwidth

(MHz), Gain = 36 dB

b’00

18.3

4.5

20.5

b’01

26.5

3.8

34.2

b’10

34.8

3.6

42.3

b’11

54.8

3.4

52.3

PA

DSP

ANTENNA

VCO

12-BIT

ADC

12-BIT

ADC

12-BIT

ADC

PGA

LNA

PGA

LNA

PGA

LNA

ADA8282

REF.

OSCILLATOR

CHIRP RAMP

GENERATOR

TRANSMIT SIGNAL GENERATION

Figure 25. Typical Signal Chain Overview