ADA8282

Data Sheet

Rev. 0 | Page 18 of 21

Register 0x05: Chip ID High Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CHIP_IDHI

Table 16. CHIP_IDHI Configuration Register Bit Descriptions

Bits

Bit Name

Description

Reset

Access

[7:0]

CHIP_IDHI

The CHIP_ID1 and CHIP_ID2 registers identify the ADA8282.

0x82

R

Register 0x06: Revision Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Revision

Table 17. Revision Configuration Register Bit Descriptions

Bits

Bit Name

Description

Reset

Access

[7:0]

Revision

The revision register identifies the silicon revision of the current die.

0x00

R

Register 0x10: LNA Offset 0 Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Unused

LNA_OFFSET0

Table 18. LNA_OFFSET0 Configuration Register Bit Descriptions

Bits

Bit Name

Description

Reset

Access

[5:0]

LNA_OFFSET0

LNA_OFFSET0 controls the offset of Channel A. The default setting (0x20) applies the minimum

offset, 0x00 applies the maximum negative offset, and 0x3F applies the maximum positive offset.

0x20

RW

The resolution of the offset varies with the LNA bias mode as follows:

LNA Bias Mode 0: 113 μV RTI offset resolution, ±4 mV range.

LNA Bias Mode 1: 186 μV RTI offset resolution, ±6 mV range.

LNA Bias Mode 2: 250 μV RTI offset resolution, ±8 mV range.

LNA Bias Mode 3: 440 μV RTI offset resolution, ±14 mV range.

Register 0x11: LNA Offset 1 Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Unused

LNA_OFFSET1

Table 19. LNA_OFFSET1 Configuration Register Bit Descriptions

Bits

Bit Name

Description

Reset

Access

[5:0]

LNA_OFFSET1

LNA_OFFSET0 controls the offset of Channel B. The default setting (0x20) applies the minimum

offset, 0x00 applies the maximum negative offset, and 0x3F applies the maximum positive offset.

0x20

RW

The resolution of the offset varies with the LNA bias mode as follows:

LNA Bias Mode 0: 113 μV RTI offset resolution, ±4 mV range.

LNA Bias Mode 1: 186 μV RTI offset resolution, ±6 mV range.

LNA Bias Mode 2: 250 μV RTI offset resolution, ±8 mV range.

LNA Bias Mode 3: 440 μV RTI offset resolution, ±14 mV range.

Register 0x12: LNA Offset 2 Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Unused

LNA_OFFSET2