SWCS049D datasheet(38/119 Pages) TI1

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TPS659110, TPS659112, TPS659113

TPS659114, TPS659118, TPS6591133

SWCS049Q – JUNE 2010 – REVISED MARCH 2016

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Specifications

(1)

TdSONT = 30 ms, as in example boot sequence.

Table 5-2 lists the power control timing characteristics.

Table 5-2. Power Control Timing Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tdbPWRONF

PWRON falling-edge debouncing delay

100

tdbPWRONR

PWRON rising-edge debouncing delay

3 × tCK32k = 94

µs

tdbPWRHOLD

PWRHOLD rising-edge debouncing delay

2 × tCK32k = 63

µs

tdOINT1

INT1 (internal) power-on pulse duration after

PWRON low-level (debounced) event

tdONPWHOLD

Delay to set high PWRHOLD signal or

DEV_ON control bit after NRESPWON

released to keep on the supplies

tdOINT1 – tDSONT =

970(1)

tdPWRONLP

PWRON long-press delay

PWRON falling-edge to

PWRON_LP_IT

tdPWRONLPTO

PWROW long-press interrupt

(PWRON_LP_IT) to supplies switch-off

PWRON_LP_IT to

NRESPWRON falling-

edge

SWCS049D 数据表(PDF) 38 Page - Texas Instruments

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