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SWCS049D 数据表(PDF) 69 Page - Texas Instruments |
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SWCS049D 数据表(HTML) 69 Page - Texas Instruments |
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69 / 119 page  69 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Detailed Description Copyright © 2010–2016, Texas Instruments Incorporated Table 6-21. RTC_STATUS_REG (continued) Description RTC status register: NOTES: A dummy read of this register is necessary before each I2C read in order to update the status register value. Type RW 7 6 5 4 3 2 1 0 POWER_UP ALARM EVENT_1D EVENT_1H EVENT_1M EVENT_1S RUN Reserved Bits Field Name Description Type Reset 7 POWER_UP Indicates that a reset occurred (bit cleared to 0 by writing 1). POWER_UP is set by a reset, is cleared by writing one in this bit. RW 1 6 ALARM Indicates that an alarm interrupt has been generated (bit clear by writing 1). The alarm interrupt keeps its low level, until the microcontroller write 1 in the ALARM bit of the RTC_STATUS_REG register. The timer interrupt is a low-level pulse (15 µs duration). RW 0 5 EVENT_1D One day has occurred RO 0 4 EVENT_1H One hour has occurred RO 0 3 EVENT_1M One minute has occurred RO 0 2 EVENT_1S One second has occurred RO 0 1 RUN 0: RTC is frozen 1: RTC is running This bit shows the real state of the RTC, indeed because of STOP_RTC signal was resynchronized on 32-kHz clock, the action of this bit is delayed. RO 0 0 Reserved Reserved bit RO R returns 0s 0 Table 6-22. RTC_INTERRUPTS_REG Address Offset 0x12 Physical Address Instance (RESET DOMAIN: FULL RESET) Description RTC interrupt control register Type RW 7 6 5 4 3 2 1 0 Reserved IT_SLEEP_ MASK_EN IT_ALARM IT_TIMER EVERY Bits Field Name Description Type Reset 7:5 Reserved Reserved bit RO R returns 0s 0x0 4 IT_SLEEP_MASK_E N 1: Mask periodic interrupt while the TPS65911x device is in SLEEP mode. Interrupt event is back up in a register and occurred as soon as the TPS65911x device is no more in SLEEP mode. 0: Normal mode, no interrupt masked RW 0 3 IT_ALARM Enable one interrupt when the alarm value is reached (TC ALARM registers) by the TC registers RW 0 2 IT_TIMER Enable periodic interrupt 0: interrupt disabled 1: interrupt enabled RW 0 1:0 EVERY Interrupt period 00: every second 01: every minute 10: every hour 11: every day RW 0x0 |
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