 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
SWCS049D 数据表(PDF) 92 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
SWCS049D 数据表(HTML) 92 Page - Texas Instruments |
|
|
92 / 119 page  92 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 SWCS049Q – JUNE 2010 – REVISED MARCH 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Detailed Description Copyright © 2010–2016, Texas Instruments Incorporated Table 6-66. INT_STS_REG (continued) Description Interrupt status register: The interrupt status bit is set to 1 when the associated interrupt event is detected. Interrupt status bit is cleared by writing 1. Type RW 7 6 5 4 3 2 1 0 RTC_PERIOD_ IT RTC_ALARM_ IT HOTDIE_IT PWRHOLD_R_ IT PWRON_LP_IT PWRON_IT VMBHI_IT PWRHOLD_F_ IT Bits Field Name Description Type Reset 7 RTC_PERIOD_IT RTC period event interrupt status. RW W1 to Clr 0 6 RTC_ALARM_IT RTC alarm event interrupt status. RW W1 to Clr 0 5 HOTDIE_IT Hot-die event interrupt status. RW W1 to Clr 0 4 PWRHOLD_R_IT Rising PWRHOLD event interrupt status. RW W1 to Clr 0 3 PWRON_LP_IT PWRON Long Press event interrupt status. RW W1 to Clr 0 2 PWRON_IT PWRON event interrupt status. RW W1 to Clr 0 1 VMBHI_IT VBAT > VMHI event interrupt status RW W1 to Clr 0 0 PWRHOLD_F_IT Falling PWRHOLD event interrupt status. RW W1 to Clr 0 Table 6-67. INT_MSK_REG Address Offset 0x51 Physical Address Instance (RESET DOMAIN: GENERAL RESET) Description Interrupt mask register: When *_IT_MSK is set to 1, the associated interrupt is masked: INT1 signal is not activated, but *_IT interrupt status bit is updated. When *_IT_MSK is set to 0, the associated interrupt is enabled: INT1 signal is activated, *_IT is updated. Type RW 7 6 5 4 3 2 1 0 RTC_PERIOD_ IT_MSK RTC_ALARM_ IT_MSK HOTDIE_ IT_MSK PWRHOLD_R_ IT_MSK PWRON_LP_ IT_MSK PWRON_ IT_MSK VMBHI_ IT_MSK PWRHOLD_F_ IT_MSK Bits Field Name Description Type Reset 7 RTC_PERIOD_IT_MS K RTC period event interrupt mask. RW 1 6 RTC_ALARM_IT_MS K RTC alarm event interrupt mask. RW 1 5 HOTDIE_IT_MSK Hot die event interrupt mask. RW 1 4 PWRHOLD_R_IT_MS K PWRHOLD rising-edge event interrupt mask. RW 1 3 PWRON_LP_IT_MSK PWRON Long Press event interrupt mask. RW 1 2 PWRON_IT_MSK PWRON event interrupt mask. RW 1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
