AD9883ASLASHPCB datasheet(25/28 Pages) AD

25 / 28 page

REV. B

AD9883A

–25–

It is also recommended to use a single ground plane for the entire

board. Experience has repeatedly shown that the noise perfor-

mance is the same or better with a single ground plane. Using

multiple ground planes can be detrimental because each separate

ground plane is smaller, and long ground loops can result.

In some cases, using separate ground planes is unavoidable. For

those cases, it is recommended to at least place a single ground

plane under the AD9883A. The location of the split should

be at the receiver of the digital outputs. For this case it is even

more important to place components wisely because the current

loops will be much longer (current takes the path of least resis-

tance). An example of a current loop:

POWER PLANE

AD9883A

DIG

ITA

D P

LAN

DIG

ITAL

GROUN

D PLANE

DIGITAL DAT

A RE

CEIV

Figure 13. Current Loop

PLL

Place the PLL loop filter components as close to the FILT pin

as possible.

Do not place any digital or other high frequency traces near

these components.

Use the values suggested in the data sheet with 10% tolerances

or less.

Outputs (Both Data and Clocks)

Try to minimize the trace length that the digital outputs have to

drive. Longer traces have higher capacitance, which requires more

current, which causes more internal digital noise.

Shorter traces reduce the possibility of reflections.

Adding a series resistor of value 22

Ω to 100 Ω can suppress reflec-

tions, reduce EMI, and reduce the current spikes inside of the

AD9883A. However, if 50

Ω traces are used on the PCB, the

data outputs should not need resistors. A 22

Ω resistor on the

DATACK output should provide good impedance matching that

will reduce reflections. If series resistors are used, place them as

close to the AD9883A pins as possible (although try not to add vias

or extra length to the output trace in order to get the resistors closer).

If possible, limit the capacitance that each of the digital outputs

drives to less than 10 pF. This can easily be accomplished by

keeping traces short and by connecting the outputs to only one

device. Loading the outputs with excessive capacitance will

increase the current transients inside of the AD9883A, creating

more digital noise on its power supplies.

Digital Inputs

The digital inputs on the AD9883A were designed to work with

3.3 V signals, but are tolerant of 5.0 V signals. Therefore, no

extra components need to be added if using 5.0 V logic.

Any noise that gets onto the Hsync input trace will add jitter to

the system. Therefore, minimize the trace length and do not run

any digital or other high frequency traces near it.

Voltage Reference

Bypass with a 0.1

µF capacitor. Place as close to the AD9883A

pin as possible. Make the ground connection as short as possible.

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