ADE3700SX datasheet(73/89 Pages) STMICROELECTRONICS

73 / 89 page

73/89

ADE3700

Output Multiplexer

2.19.1 Sub Block Function

2.19.1.1 Right Shift

shifts right from 0 to 4 positions, fills from the top with zeroes

out_mux_ctrl1[2:0]

2.19.1.2 Byte Flip

flips data bits in a byte from LSB to MSB, i.e. out[7:0] = in[0:7]

out_mux_ctrl0[4]

2.19.1.3 Red & Blue Swap

swaps red and blue channels, i.e. out[23:0] = {in[7:0],in[15:8],in[23:16]}

out_mux_ctrl0[3]

2.19.1.4 Single to Double Wide Converter

in Single Wide mode (out_mux_ctrl0[1] = 0)

— flops all data into either A or B channels depending on out_mux_ctrl0[2]

— either inv_a or inv_b is active depending on active channel

in Double Wide mode (out_mux_ctrl0[1] = 1)

— flops data into A/B or B/A positions depending on out_mux_ctrl0[2].

— divides clock by 2 (hclk = half speed DCLK), resyncing each line with data enable

— output data transitions as posedge/negedge as set in out_mux_ctrl0[5]

— can handle odd output htotal (i.e. all divide by 2’s and state machines must be resynced per

line)

2.19.1.5 Data Inversion

resyncs at the end of each line to inactive state with data enable falling edge

−

invert is possible on the first pixel – compares 1st pixel to blanking value

compares subsequent 24-bit/48-bit data to the last output; if more bits flip (i.e. hamming

distance > active_bit_width/2), invert data word and toggle invert pin

counts only active bits in hamming distance as determined by right shift and bit flip settings;

zeroes out non active data signals at output

controls:

— out_mux_ctrl1[4]

- A and B channels have separate independent

- A and B channels treated as one 48-bit channel, inv_a = inv_b

— out_mux_ctrl1[5]

- data invert output polarity

— out_mux_ctrl1[6]

- data invert enable

data invert pins can also be driven by tcon srtd[26] and srtd[27] for panel balancing

(out_mux_ctrl2[6] and out_mux_ctrl2[7])

data can be inverted at the front end of the data inversion detection using tcon signals, either

separate or combined channels (out_mux_ctrl3[0])

2.19.1.6 Output Mux / Reg

combines all signals to form the desired outputs

ADE3700SX 数据表(PDF) 73 Page - STMicroelectronics

ADE3700SX 数据表(HTML) 73 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

数据表下载