数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AT86RF211DAI-R 数据表(PDF) 30 Page - ATMEL Corporation

部件名 AT86RF211DAI-R
功能描述  FSK Transceiver for ISM Radio Applications
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT86RF211DAI-R 数据表(HTML) 30 Page - ATMEL Corporation

Back Button AT86RF211DAI-R Datasheet HTML 26Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 27Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 28Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 29Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 30Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 31Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 32Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 33Page - ATMEL Corporation AT86RF211DAI-R Datasheet HTML 34Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 30 / 48 page
background image
30
AT86RF211
1942C–WIRE–06/02
If the tolerance is too high, the rate value is reached earlier, and the rate value could be
unstable (too big step).
If the tolerance is too low, it could be difficult to catch up the DATA and the function
could get lost.
Notice that maximum acceptable distance between two data transitions depends on the
precision of DATARATE versus transmitter actual data rate.
Synchronization mechanism is explained with the chronogram hereafter. The synchroni-
zation is done for the first bit. In worst case conditions, when data and clock arrive at the
same time, it begins at the second bit. Notice that the DATACLK signal is available as
soon as the DATACLK bit is programmed, whatever the state of DATAMSG pin.
The programmed data rate allows the creation of a basic clock at the programmed DAT-
ARATE frequency at the beginning of the reception. Then, the clock is shifted if
necessary from the tolerance value, depending on the previous DATA transition: the
clock is moved later or sooner, depending on the gap between CLOCK and DATA.
For example:
if DATARATE = 50 kbps, which is equivalent to a duration of 200 x T for 1 bit, with
T = 100 ns = base clock period.
if DATATOL = 2% x DATARATE = 4 x T.
Figure 34. Clock Recovery
DATARATE Programming
This value must be programmed only when the DATA clock is needed on DATACLK
output pin of the chip.
The DATA rate can be programmed from 1 kbps to 64 kbps with 14 bits of CTRL2
register.
DATARATE is the period of the data rate and can be programmed with a resolution
given by the crystal oscillator period:
10.245 MHz oscillator, period = T = 97.6 ns
20.945 MHz oscillator, period = T = 95.5 ns
Some datarate values with the 10.245 MHz oscillator given for example:
Tol = 4T
Synchronized values with DATAMSG
Expected value
Expected value
200T
DATAMSG
DATACLK
Tol = 4T
DATARATE[13:0]
Rate
Period
(160)
10
64 kbps
1 bit ~ 160 x T
(205)
10
50 kbps
1 bit ~ 205 x T
(vv)
10
……
1 bit ~vvxT
(534)
10
19.2 kbps
1 bit ~ 534 x T
(1024)
10
10 kbps
1 bit ~ 1024 x T



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com