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CS8413 数据表(PDF) 29 Page - List of Unclassifed Manufacturers

部件名 CS8413
功能描述  96 KHZ DIGITAL AUDIO RECEIVER
PDF  38 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

CS8413 数据表(HTML) 29 Page - List of Unclassifed Manufacturers

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CS8413 CS8414
DS240F1
29
INT - Interrupt, PIN 14.
Open drain output that can signal the state of the internal buffer memory as well as error
information. A 5k
Ω resistor to VD+ is typically used to support logic gates. All bits affecting
INT are maskable to allow total control over the interrupt mechanism.
Receiver Interface
RXP, RXN - Differential Line Receivers, PINS 9, 10.
RS422 compatible line receivers. Described in detail in Appendix A.
Phase Locked Loop
MCK - Master Clock, PIN 19.
Low jitter clock output of 256 times the received sample frequency.
FILT - Filter, PIN 20.
An external 470
Ω resistor and 0.068µF capacitor are required from the FILT pin to analog
ground.



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