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P89LPC901FD 数据表(PDF) 8 Page - NXP Semiconductors |
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P89LPC901FD 数据表(HTML) 8 Page - NXP Semiconductors |
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8 / 55 page ![]() Philips Semiconductors P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 04 — 21 November 2003 8 of 55 9397 750 12293 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 5.2 Pin description Fig 8. P89LPC903 pinning (SO8). handbook, halfpage 002aaa440 1 2 3 4 8 7 6 5 VSS P0.4/CIN1A/KBI4 P0.5/CMPREF/KBI5 P1.0/TxD VDD P0.2/CIN2A/KBI2 P1.1/RxD RST/P1.5 Table 3: P89LPC901 pin description Symbol Pin Type Description P0.0 - P0.6 6, 7 I/O Port 0: Port 0 is an I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port configurations” and Table 13 “DC electrical characteristics” for details. The Keypad Interrupt feature operates with Port 0 pins. All pins have Schmitt triggered inputs. Port 0 also provides various special functions as described below: 7 I/O P0.4 — Port 0 bit 4. I CIN1A — Comparator 1 positive input. I KBI4 — Keyboard input 4. 6 I/O P0.5 — Port 0 bit 5. I CMPREF — Comparator reference (negative) input. I KBI5 — Keyboard input 5. P1.0 - P1.5 4, 5 Port 1: Port 1 is an I/O port with a user-configurable output type. During reset Port 1 latches are configured in the input only mode with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs and outputs depends upon the port configuration selected. Each of the configurable port pins are programmed independently. Refer to Section 8.12.1 “Port configurations” and Table 13 “DC electrical characteristics” for details. P1.5 is input only. All pins have Schmitt triggered inputs. Port 1 also provides various special functions as described below: 5 I/O P1.2 — Port 1 bit 2. O T0 — Timer/counter 0 external count input or overflow output. 4I P1.5 — Port 1 bit 5 (input only). I RST — External Reset input during Power-on or if selected via UCFG1. When functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O ports and peripherals to take on their default states, and the processor begins execution at address 0. Also used during a power-on sequence to force In-System Programming mode. |
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