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P89LPC901FD 数据表(PDF) 25 Page - NXP Semiconductors |
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P89LPC901FD 数据表(HTML) 25 Page - NXP Semiconductors |
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25 / 55 page ![]() Philips Semiconductors P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 04 — 21 November 2003 25 of 55 9397 750 12293 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 8.2.5 High speed oscillator option (P89LPC901) This option supports an external crystal in the range of 4 MHz to 12 MHz. Ceramic resonators are also supported in this configuration. If CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ‘1’ to reduce power consumption. On reset, CLKLP is ‘0’ allowing highest performance access. This bit can then be set in software if CCLK is running at 8 MHz or slower. 8.2.6 Clock output (P89LPC901) The P89LPC901 supports a user selectable clock output function on the XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if another clock source has been selected (on-chip RC oscillator, Watchdog oscillator, external clock input on X1) and if the Real-Time clock is not using the crystal oscillator as its clock source. This allows external devices to synchronize to the P89LPC901. This output is enabled by the ENCLK bit in the TRIM register. The frequency of this clock output is 1 ⁄ 2 that of the CCLK. If the clock output is not needed in Idle mode, it may be turned off prior to entering Idle, saving additional power. 8.3 On-chip RC oscillator option The P89LPC901/902/903 has a 6-bit TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz, ±2.5%. End-user applications can write to the Trim register to adjust the on-chip RC oscillator to other frequencies. If CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ‘1’ to reduce power consumption. On reset, CLKLP is ‘0’ allowing highest performance access. This bit can then be set in software if CCLK is running at 8 MHz or slower. 8.4 Watchdog oscillator option The Watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator can be used to save power when a high clock frequency is not needed. 8.5 External clock input option (P89LPC901) In this configuration, the processor clock is derived from an external source driving the XTAL1/P3.1 pin. The rate may be from 0 Hz up to 12 MHz. The XTAL2/P3.0 pin may be used as a standard port pin or a clock output. |
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