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P89LPC901FD 数据表(PDF) 38 Page - NXP Semiconductors |
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P89LPC901FD 数据表(HTML) 38 Page - NXP Semiconductors |
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38 / 55 page ![]() Philips Semiconductors P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 04 — 21 November 2003 38 of 55 9397 750 12293 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 8.20 Internal reference voltage An internal reference voltage generator may supply a default reference when a single comparator input pin is used. The value of the internal reference voltage, referred to as VREF, is 1.23 V ±10%. 8.21 Comparator interrupt Each comparator has an interrupt flag contained in its configuration register. This flag is set whenever the comparator output changes state. The flag may be polled by software or may be used to generate an interrupt. 8.22 Comparator and power reduction modes The comparators may remain enabled when Power-down or Idle mode is activated, but the comparators are disabled automatically in Total Power-down mode. If the comparator interrupt is enabled (except in Total Power-down mode), a change of the comparator output state will generate an interrupt and wake up the processor. If the comparator output to a pin is enabled, the pin should be configured in the push-pull mode in order to obtain fast switching times while in Power-down mode. The reason is that with the oscillator stopped, the temporary strong pull-up that normally occurs during switching on a quasi-bidirectional port pin does not take place. The comparator consumes power in Power-down and Idle modes, as well as in the normal operating mode. This fact should be taken into account when system power consumption is an issue. To minimize power consumption, the user can disable the comparator via PCONA.5 or put the device in Total Power-down mode. Fig 19. Comparator input and output connections. Comparator 1 CN1 (P0.4) CIN1A (P0.5) CMPREF VREF OE1 Change Detect CO1 CMF1 Interrupt 002aaa453 CMP1 (P0.6) EC Change Detect CMF2 Comparator 2 OE2 CO2 CMP2 (P0.0) CN2 (P0.2) CIN2A |
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