P89LPC901FD datasheet(37/55 Pages) PHILIPS

37 / 55 page

Philips Semiconductors

P89LPC901/902/903

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 04 — 21 November 2003

37 of 55

9397 750 12293

8.18.9

Transmit interrupts with double buffering enabled (Modes 1, 2 and 3)

Unlike the conventional UART, in double buffering mode, the Tx interrupt is generated

when the double buffer is ready to receive new data.

8.18.10

The 9th bit (bit 8) in double buffering (Modes 1, 2 and 3)

If double buffering is disabled TB8 can be written before or after SBUF is written, as

long as TB8 is updated some time before that bit is shifted out. TB8 must not be

changed until the bit is shifted out, as indicated by the Tx interrupt.

If double buffering is enabled, TB8 must be updated before SBUF is written, as TB8

will be double-buffered together with SBUF data.

8.19 Analog comparators

One analog comparator is provided on the P89LPC901. Two analog comparators are

provided on the P89LPC902 and P89LPC903 devices. Comparator operation is such

that the output is a logical one (which may be read in a register) when the positive

input is greater than the negative input (selectable from a pin or an internal reference

voltage). Otherwise the output is a zero. The comparator may be conﬁgured to cause

an interrupt when the output value changes.

The connections to the comparator are shown in Figure 19. Note: Not all possible

comparator conﬁgurations are available on all three devices. Please refer to the Logic

diagrams in Section 6 “Logic symbols” on page 12. The comparator functions to

VDD = 2.4 V.

When the comparator is ﬁrst enabled, the comparator output and interrupt ﬂag are not

guaranteed to be stable for 10 microseconds. The comparator interrupt should not be

enabled during that time, and the comparator interrupt ﬂag must be cleared before

the interrupt is enabled in order to prevent an immediate interrupt service.

When a comparator is disabled the comparator’s output, COx, goes HIGH. If the

comparator output was LOW and then is disabled, the resulting transition of the

comparator output from a LOW to HIGH state will set the comparator ﬂag, CMFx.

This will cause an interrupt if the comparator interrupt is enabled. The user should

therefore disable the comparator interrupt prior to disabling the comparator.

Additionally, the user should clear the comparator ﬂag, CMFx, after disabling the

comparator.

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