CS8406

DS580F1

3

12.3 Power Supply, Grounding, and PCB layout ................................................................... 36

12.4 Synchronization of Multiple CS8406s ............................................................................ 36

13. PACKAGE DIMENSIONS .................................................................................................. 37

14. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958 TRANSMITTER COMPONENTS ...... 39

14.1 AES3 Transmitter External Components ....................................................................... 39

14.2 Isolating Transformer Requirements ............................................................................. 39

15. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........... 40

15.1 AES3 Channel Status(C) Bit Management .................................................................... 40

15.1.1 Accessing the E buffer ...................................................................................... 40

15.1.2 Serial Copy Management System (SCMS) ....................................................... 41

15.1.3 Channel Status Data E Buffer Access .............................................................. 41

15.2 AES3 User (U) Bit Management .................................................................................... 42

15.2.1 Mode 1: Transmit All Zeros ............................................................................... 42

15.2.2 Mode 2: Block Mode ......................................................................................... 42

16. REVISION HISTORY ............................................................................................................ 43