ST72561 datasheet(5/262 Pages) STMICROELECTRONICS

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ST72561

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1 INTRODUCTION

The ST72561/ST72563 devices are members of

the ST7 microcontroller family designed for mid-

range applications with CAN (Controller Area Net-

work) and LIN (Local Interconnect Network) inter-

face.

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

tion set and are available with FLASH or ROM pro-

gram memory.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication

and indirect addressing

modes.

Figure 1. Device Block Diagram

8-BIT CORE

ALU

OSC1

OSC2

RESET

PORT A

CONTROL

RAM

(512 - 2048 Bytes)

PA7:0

(8 bits)1

PROGRAM

(16 - 60 K Bytes)

MEMORY

PLL x 2

PWM

8-bit

PORT B

PORT C

SPI

LIN

SCI2

PB7:0

(8 bits)1

PC7:0

(8 bits)1

CAN

(2.0B ACTIVE)

OSC

PORT D

PD7:0

(8 bits)1

option

LIN

SCI1

16-Bit

TIMER

(LIN master)

(LIN master/slave)

VSS

VDD

POWER

SUPPLY

PORT E

PE7:0

(8 bits)1

PORT F

PF7:0

(8 bits)1

TIMER

ART

MCC

(Clock Control)

1On some devices only, see Device Summary on page 1

TLI1

WATCHDOG

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