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STV6889 数据表(PDF) 28 Page - STMicroelectronics |
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STV6889 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 56 page ![]() STV6889 28/56 Sad16h/D7 - XRayReset Reset to 0 of XRay flag of status register effect- ed with ACK bit of I²C-bus data transfer into reg- ister containing the XRayReset bit. Also see de- scription of the flag. 0: No effect 1: Reset with automatic return of the bit to 0 Sad17h/D0 - BlankMode Blanking operation Mode. 0: Blanking pulse starting with detection of vertical synchronization pulse and ending with end of vertical oscillator discharge (start of vertical sawtooth ramp on the VOut pin) 1: Permanent blanking - high blanking level in composite signal on pin HLckVBk is perma- nent Sad17h/D1 - VOutEn Vertical Output Enable. 0: Disabled, VoffVOut on VOut pin (see Section 6.5 Vertical section ) 1: Enabled, vertical ramp with vertical position offset on VOut pin Sad17h/D2 - HBOutEn Horizontal and B+ Output Enable. 0: Disabled, levels corresponding to “power transistor off” on HOut and BOut pins (high for HOut, high or low for BOut, depending on BOutPol bit). 1: Enabled, horizontal deflection drive signal on HOut pin providing that it is not inhibited by another internal event (activated XRay protection). B+ drive signal on BOut pin if not inhibited by another internal event. Programming the bit to 1 after prior value of 0, will initiate soft start mechanism of horizontal drive and, if this is not inhibited by another inter- nal event, also the soft start of B+ DC/DC con- vertor controller. See also bits BMute and BSa- feEn. Sad17h/D3 - BOHEdge If the bit BOutPh is at 1, selection of Edge of Hor- izontal drive signal to phase B+ drive Output sig- nal on BOut pin. 1: Rising edge 0: Falling edge If the bit BOutPh is at 0, selection of signal to phase B+ drive output on BOut pin: 1: Horizontal frequency divided by 2 signal, top of horizontal VCO 0: End of horizontal flyback Sad17h/D4,D5,D6,D7 - THM, TVM, TH, TV Test bits. They must be kept at 0 level by appli- cation S/W. Sad1Fh/D2 - HLockSpeed Response Speed of lock-to-unlock transition of H-lock component on HLock output and HLock I²C-bus flag at signal change. 0: Low 1: High Sad1Fh/D3 - Ident Device Identification bit. If HBOutEn is at 1, the bit has no effect. If HBOutEn is at 0, then 0: The value of Hlock status bit is 1 1: The value of Hlock status bit is 0 Sad1Fh/D4 - EWTrHSize Tracking of all corrections contained in wave- form on pin EWOut with Horizontal Size I²C-bus register HSIZE. 0: Active 1: Not active Sad1Fh/D5 - BSafeEn B+ Output Safety Enable. 0: Disabled 1: Enabled, BOut goes off as soon as HLock status of Horizontal PLL1 indicates “unlock” state. Retrieval of “lock” state will initiate soft start mechanism of DC/DC controller on BOut output. Sad1Fh/D6 - BMute B+ Output Mute. 0: Disabled 1: Enabled, BOut goes unconditionally off. Programming this bit back to 0 will initiate soft start mechanism of DC/DC controller on BOut output. Sad1Fh/D7 - ThrBlsense Threshold on BISense input corresponding to current limitation. 0: High 1: Low |
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