STV6889 datasheet(43/56 Pages) STMICROELECTRONICS

43 / 56 page

STV6889

43/56

9.6 Dynamic correction outputs section

9.6.1

Vertical dynamic correction output

VDyCor

A parabola at vertical deflection frequency is avail-

able on pin VDyCor. Its amplitude is adjustable via

VDC-AMP I²C-bus control and polarity controlled

via VDyCorPol I²C-bus bit. It tracks with real verti-

cal amplitude and position. It is not affected by C-

and S-corrections or breathing compensation. It

does not track with Vertical size after-gain

(Sad1Dh)

nor

with

Vertical

position

offset

(Sad1Eh) adjustments.

The use of both correction waveforms is up to the

application (e.g. dynamic focus, dynamic bright-

ness control).

9.7 DC/DC controller section

The section is designed to control a switch-mode

DC/DC converter. A switch-mode DC/DC conver-

tor generates a DC voltage from a DC voltage of

different value (higher or lower) with little power

losses. The DC/DC controller is synchronized to

horizontal deflection frequency to minimize poten-

tial interference into the picture.

Its operation is similar to that of standard UC3842.

The schematic diagram of the DC/DC controller is

in Figure 16. The BOut output controls an external

switching circuit (a MOS transistor) delivering

pulses synchronized on horizontal deflection fre-

quency, the phase of which depends on H/W and

I²C-bus configuration. See the table at the end of

this chapter. Their duration depends on the feed-

back provided to the circuit, generally a copy of

DC/DC converter output voltage and a copy of cur-

rent passing through the DC/DC converter circuitry

(e.g. current through external power component).

The polarity of the output can be controlled by

BOutPol I²C-bus bit. A NPN transistor open-collec-

tor is routed out to the BOut pin.

During the operation, a sawtooth is to be found on

pin BISense, generated externally by the applica-

tion. According to BOutPh I²C-bus bit, the R-S flip-

flop is set either at H-drive signal edge (rising or

falling, depending on BOHEdge I²C-bus bit), or a

certain delay (tBTrigDel) after middle of H-flyback, or

at horizontal frequency divided by two (phase cor-

responding to VHOThrHi on the VCO ramp). The out-

put is set On at the end of the short pulse generat-

ed by the monostable trigger.

Timing of reset of the R-S flip-flop affects duty cy-

cle of the output square signal and so the energy

transferred from DC/DC converter input to its out-

put. A reset edge is provided by comparator C2 if

the voltage on pin BISense exceeds the internal

threshold VThrBIsCurr. This represents current limita-

tion if a voltage proportional to the current through

the power component or deflection stage is availa-

ble on pin BISense. This threshold is affected by

voltage on pin HPosF, which rises at soft start and

descends at soft stop. This ensures self-contained

soft control of duty cycle of the output signal on pin

BOut

. Refer to Figure 10. Another condition for reset

of the R-S flip-flop, OR-ed with the one described

before, is that the voltage on pin BISense exceeds

the voltage VC2, which depends on the voltage ap-

plied on input BRegIn of the error amplifier O1. The

two voltages are compared, and the reset signal

generated by the comparator C1. The error ampli-

fier amplifies (with a factor defined by external

components) the difference between the input

voltage proportional to DC/DC convertor output

voltage and internal reference VBReg. The internal

reference and so the output voltage is I²C-bus ad-

justable by means of BREF I²C-bus control.

Both step-up (DC/DC converter output voltage

higher than its input voltage) and step-down (out-

put voltage lower than input) can be built.

9.7.1

Synchronization of DC/DC controller

For sake of application flexibility, the output drive

signal on BOut pin can be synchronized with one of

four events in Table 9. For the first line case, the

synchronization instant is every second top of hor-

izontal VCO saw tooth. See Figure 7.

9.7.2

Soft-start and soft-stop on B-drive

The soft-start and soft-stop procedure is carried

out at each switch-on or switch-off of the B-drive

signal, either via HBOutEn I²C-bus bit or after re-

set of XRayAlarm I²C-bus flag, to protect external

power component. See Figure 10 and sub chapter

Safety functions

on page 45.

The drive signal on BOut pin can be switched off

alone by means of BMute I²C-bus bit, without

switching off the drive signal on pin HOut. The

switch-off is quasi-immediate, without the soft-stop

procedure. At switching back on, the soft-start of

the DC/DC controller is performed, timed by an in-

ternal timing circuit, see Figure 16.

When BSafeEn I²C-bus bit is enabled, the drive

signal on BOut pin will go off as soon as the hori-

zontal PLL1 indicates unlocked state, without the

soft-stop. Resuming of locked state will initiate the

soft-start mechanism of the DC/DC controller,

timed by an internal timing circuit.

STV6889 数据表(PDF) 43 Page - STMicroelectronics

STV6889 数据表(HTML) 43 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载