数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADE3000SX 数据表(PDF) 74 Page - STMicroelectronics

部件名 ADE3000SX
功能描述  LCD Display Engines with Integrated DVI, ADC and YUV Ports
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ADE3000SX 数据表(HTML) 74 Page - STMicroelectronics

Back Button ADE3000SX Datasheet HTML 70Page - STMicroelectronics ADE3000SX Datasheet HTML 71Page - STMicroelectronics ADE3000SX Datasheet HTML 72Page - STMicroelectronics ADE3000SX Datasheet HTML 73Page - STMicroelectronics ADE3000SX Datasheet HTML 74Page - STMicroelectronics ADE3000SX Datasheet HTML 75Page - STMicroelectronics ADE3000SX Datasheet HTML 76Page - STMicroelectronics ADE3000SX Datasheet HTML 77Page - STMicroelectronics ADE3000SX Datasheet HTML 78Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 74 / 88 page
background image
Gamma Block
ADE3XXX
74/88
2.21
Gamma Block
The Gamma block performs an 8 bit to 10 bit lookup table on the 3 x 8 bits (R, G, B) color data
coming from SCALER.
The RAMs are individually programmable (read and write) using I2C access. The memory map is
as follows:
I2C address 0x1000 - 0x11FF: red RAM
I2C address 0x1200 - 0x13FF: green RAM
I2C address 0x1400 - 0x15FF: blue RAM
Even addresses are the 8-bit LSBs of the 10-bit gamma value. Odd addresses are the 2 MSBs.
2.22
APC Block
APC (formerly known as Arithmos Perfect Color) dithers an input 10-bit video stream down to 4-8
output bits. The dithering is done in space and time in such a way that the eye does not perceive
objectionable artifacts such as:
q
fixed dither patterns,
q
contours,
q
flickering pixels
q
phase correlated flickering, which creates wave patterns known as "swimming".
FLK_MEAS7_0
0x0CCD
R/W
[7:0]
0x0
Score for Pattern 7
FLK_MEAS7_1
0x0CCE
R/W
[7:0]
FLK_MEAS7_2
0x0CCF
R/W
[7:0]
FLK_MEAS7_3
0x0CD0
R/W
[7:0]
Table 27: Gamma Registers
Register Name
Addr
Mode
Bits
Default
Description
GAMMA_CTRL
0x0C10
R/W
[7:4]
0x0
Reserved
[3]
0x0
0: Normal
1: Disable RAM access
[2]
0x0
0: Normal
1: Test Mode
[1:0]
0x0
Gamma Mode Select
0x0: 10b linear bypass
0x1: 8b->10b gamma table (normal)
0x2: 8b linear bypass (no interpolation)
0x3: 8b->10b gamma table (normal)
Table 26: Flicker Registers (Sheet 3 of 3)
Register Name
Addr
Mode
Bits
Default
Description



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com