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MCP3913 数据表(PDF) 3 Page - Microchip Technology

部件名 MCP3913
功能描述  3V Six-Channel Analog Front End
PDF  82 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP3913 数据表(HTML) 3 Page - Microchip Technology

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 2013 Microchip Technology Inc.
DS20005227A-page 3
MCP3913
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
V
DD ..................................................................... -0.3V to 4.0V
Digital inputs and outputs w.r.t. AGND................--0.3V to 4.0V
Analog input w.r.t. AGND..................................... ....-2V to +2V
VREF input w.r.t. AGND............................... -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD on the analog inputs (HBM,MM) ................. 1.5 kV, 300V
ESD on all other pins (HBM,MM) ...........................2 kV, 300V
† Notice
: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other condi-
tions, above those indicated in the operational listings
of this specification, is not implied. Exposure to maxi-
mum rating conditions for extended periods may affect
device reliability.
1.1
Electrical Specifications
TABLE 1-1:
ANALOG SPECIFICATIONS
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;
PRE<1:0> = 00
; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM =0V;
TA = -40°C to +125°C;VIN = -0.5 dBFS @ 50/60 Hz on all channels.
Characteristic
Sym.
Min.
Typ.
Max.
Units
Conditions
ADC Performance
Resolution
(No missing codes)
24
bits
OSR = 256 or greater
Sampling Frequency
fS(DMCLK)
1
4
MHz
For maximum condition,
BOOST<1:0> = 11
Output Data Rate
fD(DRCLK)
4
125
ksps
For maximum condition,
BOOST<1:0> = 11,
OSR = 32
Analog Input Absolute
Voltage on CHn+/- pins,
n between 0 and 5
CHn+/-
-1
+1
V
All analog input channels,
measured to AGND
Analog Input
Leakage Current
IIN
+/-1
nA
RESET<5:0> = 111111,
MCLK running continuously
Differential Input
Voltage Range
(CHn+-CHn-) -600/GAIN — +600/GAIN
mV
VREF =1.2V,
proportional to VREF
Offset Error
VOS
-1
0.2
1
mV
Note 5
Offset Error Drift
0.5
µV/°C
Gain Error
GE
-4
+4
%
Note 5
Gain Error Drift
1
ppm/°C
Note 1:
Dynamic Performance specified at -0.5 dB below the maximum differential input value,
VIN =1.2 VPP = 424 mVRMS @ 50/60 Hz, VREF = 1.2V. See Section 4.0 “Terminology And Formulas” for definition.
This parameter is established by characterization and not 100% tested.
2:
For these operating currents, the following configuration bit settings apply: SHUTDOWN<5:0> = 000000
,
RESET<5:0> = 000000
, VREFEXT = 0, CLKEXT = 0.
3:
For these operating currents, the following configuration bit settings apply: SHUTDOWN<5:0> = 111111
,
VREFEXT = 1, CLKEXT = 1.
4:
Measured on one channel versus all others channels. The average of crosstalk performance over all channels
(see Figure 2-32 for individual channel performance).
5:
Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical
performance.
6:
Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to
the part with no damage.
7:
For proper operation and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler
settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.



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