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CS89712 数据表(PDF) 116 Page - Cirrus Logic

部件名 CS89712
功能描述  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS89712 数据表(HTML) 116 Page - Cirrus Logic

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CS89712
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DS502PP2
3.17 Ethernet Bus Interface Registers
3.17.1
Master Interrupt Enable (address offset 0022h)
Reset value is: XXXX XXXX XXXX X100 - Interrupts disabled
3.17.2
EEPROM Command (address offset 0040h)
This register is used to control the reading, writing and erasing of the EEPROM. See Section 2.24,
“Programming
the EEPROM”.
Reset value is: XXXX XXXX XXXX XXXX
3.17.3
EEPROM Data (address offset 0042h)
This register contains the word being written to, or read from, the EEPROM. See Section 2.24,
“Programming the
EEPROM”.
Reset value is: XXXX XXXX XXXX XXXX
3.17.4
Receive Frame Byte Counter (address offset 0050h)
This register contains the count of the total number bytes received in the current received frame. This count contin-
uously increments as more bytes in this frame are received. See Section 2.32,
“Basic Receive Operation”.
Reset value is: XXXX XXXX XXXX XXXX
3.18 Ethernet Port Status/Control Registers
3.18.1
Interrupt Status Queue Register (ISQ, address 120h)
The Interrupt Status Queue Register is used to provide interrupt information. Whenever an event occurs that triggers
an enabled interrupt, the Ethernet Port sets the appropriate bit(s) in one of five registers, maps the contents of that
register to the ISQ register, and drives an IRQ pin high. Three of the registers mapped to ISQ are event registers:
Address 0023h
Address 0022h
00h
Interrupt number assignment:
0000 0000b = Enable
0000 01xxb = Disable
7:0
F:B
A
9
8
ADD7 to ADD0
Reserved
Reserved
OB1
OB0
Bit
Description
7:0
ADD7-ADD0: Address of the EEPROM word being accessed.
9:8
OB1,OB0: Indicates the Opcode of the command being executed. See Table 26.
A
Reserved: Reserved and must be written as 0.
F:B
Reserved: Reserved and must be written as 0.
Table 65. EEPROM Command Bits
Address 0043h
Address 0042h
Most significant byte of the EEPROM data.
Least significant byte of the EEPROM data.
Address 0051h
Address 0050h
Most significant byte of the byte count.
Least significant byte of the byte count.
7:6
5:0
F:8
RegContent
RegNum
RegContent



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