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LM53602, LM53603

SNVSAR0 – NOVEMBER 2016

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Copyright © 2016, Texas Instruments Incorporated

11 Layout

11.1 Layout Guidelines

The PCB layout of any DC-DC converter is critical to the optimal performance of the design. Bad PCB layout can

disrupt the operation of an otherwise good schematic design. Even if the converter regulates correctly, bad PCB

layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore,

the EMI performance of the regulator is dependent on the PCB layout, to a great extent. In a buck converter, the

most critical PCB feature is the loop formed by the input capacitor and power ground, as shown in Figure 46.

This loop carries fast transient currents that can cause large transient voltages when reacting with the trace

inductance. These unwanted transient voltages disrupt the proper operation of the converter. Because of this, the

traces in this loop should be wide and short, and the loop area as small as possible to reduce the parasitic

inductance. Figure 47 shows a recommended layout for the critical components of the LM53603. This PCB

layout is a good guide for any specific application. The following important guidelines must also be followed:

1. Place the input capacitor(s) CIN as close as possible to the VIN and PGND terminals. VIN and GND

are on the same side of the device, simplifying the input capacitor placement.

2. Place bypass capacitors for VCC and BIAS close to their respective pins. These components must be

placed close to the device and routed with short and wide traces to the pins and ground. The trace from

BIAS to VOUT should be

≥10 mils wide. BIAS and VCC capacitors must be place within 4 mm of the BIAS

and VCC pin (160 mils) .

3. Use wide traces for the CBOOT capacitor. CBOOT must be placed close to the device with short and wide

traces to the CBOOT and SW pins.

4. Place the feedback divider as close as possible to the FB pin on the device. If a feedback divider and

somewhat longer. However, this latter trace must not be routed near any noise sources that can capacitively

couple to the FB input.

5. Use at least one ground plane in one of the middle layers. This plane acts as a noise shield and also act

as a heat dissipation path.

6. Connect the EP pad to the GND plane. This pad acts as a heat sink connection and a ground connection

for the regulator. It must be solidly connected to a ground plane. The integrity of this connection has a direct

7. Provide wide paths for VIN, VOUT and GND. Making these paths as wide as possible reduces any voltage

drops on the input or output paths of the converter and maximizes efficiency.

8. Provide enough PCB area for proper heat sinking. As stated in the Maximum Ambient Temperature

current and ambient temperature. The top and bottom PCB layers must be made with two ounce copper; and

no less than one ounce. Use an array of heat sinking vias to connect the exposed pad (EP) to the ground

plane on the bottom PCB layer. If the PCB has multiple copper layers (recommended), these thermal vias

can also be connected to the inner layer heat-spreading ground planes.

9. Keep switch area small. The copper area connecting the SW pin to the inductor must be kept as short and

wide as possible. At the same time the total area of this node must be minimized to help mitigate radiated

EMI.

10. These resources provide additional important guidelines:

–

AN-1149 Layout Guidelines for Switching Power Supplies (SNVA021)

–

AN-1229 Simple Switcher PCB Layout Guidelines (SNVA054)

–

Constructing Your Power Supply- Layout Considerations (SLUP230)

–

Low Radiated EMI Layout Made SIMPLE with LM4360x and LM4600x (SNVA721)