STM32L475VC datasheet(127/193 Pages) STMICROELECTRONICS

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STM32L475xx

Electrical characteristics

181

Ilkg

FT_xx input leakage

current(3)

VIN ≤ Max(VDDXXX)(4)

±100

Max(VDDXXX) ≤ VIN ≤

Max(VDDXXX)+1 V(4)(5)

650(3)(6)

Max(VDDXXX)+1 V <

VIN ≤ 5.5 V(3)(5)

200(6)

FT_lu, FT_u and

PC3 IO

VIN ≤ Max(VDDXXX) (4)

±150

Max(VDDXXX) ≤ VIN ≤

Max(VDDXXX)+1 V(4)

2500(3)(7)

Max(VDDXXX)+1 V <

VIN ≤ 5.5 V(4)(5)(7)

250(7)

TT_xx input leakage

current

VIN ≤ Max(VDDXXX)(6)

±150

Max(VDDXXX) ≤ VIN <

3.6 V(6)

2000(3)

RPU

Weak pull-up

equivalent resistor (8)

VIN = VSS

kΩ

RPD

Weak pull-down

equivalent resistor(8)

VIN = VDDIOx

kΩ

CIO

I/O pin capacitance

1. Refer to Figure 19: I/O input characteristics.

2. Tested in production.

3. Guaranteed by design.

4. Max(VDDXXX) is the maximum value of all the I/O supplies. Refer to Table: Legend/Abbreviations used in the pinout table.

5. All TX_xx IO except FT_lu, FT_u and PC3.

6. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula:

ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max).

7. To sustain a voltage higher than MIN(VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must be

disabled.

8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

Table 59. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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