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STM32L475VC 数据表(PDF) 23 Page - STMicroelectronics |
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STM32L475VC 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 193 page  Standby LPR Powered Off Off SRAM2 ON LSE LSI BOR, RTC, IWDG *** All other peripherals are powered off. *** I/O configuration can be floating, pull-up or pull-down Reset pin 5 I/Os (WKUPx)(10) BOR, RTC, IWDG 0.35 µA w/o RTC 0.65 µA w/ RTC 14 µs OFF Powered Off 0.12 µA w/o RTC 0.42 µA w/ RTC Shutdown OFF Powered Off Off Powered Off LSE RTC *** All other peripherals are powered off. *** I/O configuration can be floating, pull-up or pull-down(11) Reset pin 5 I/Os (WKUPx)(10) RTC 0.03 µA w/o RTC 0.33 µA w/ RTC 256 µs 1. LPR means Main regulator is OFF and Low-power regulator is ON. 2. All peripherals can be active or clock gated to save power consumption. 3. Typical current at VDD = 1.8 V, 25°C. Consumptions values provided running from SRAM, Flash memory Off, 80 MHz in Range 1, 26 MHz in Range 2, 2 MHz in LPRun/LPSleep. 4. The Flash memory can be put in power-down and its clock can be gated off when executing from SRAM. 5. The SRAM1 and SRAM2 clocks can be gated on or off independently. 6. U(S)ART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, address match or received frame event. 7. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match. 8. OTG_FS wakeup by resume from suspend and attach detection protocol event. 9. SWPMI1 wakeup by resume from suspend. 10. The I/Os with wakeup from Standby/Shutdown capability are: PA0, PC13, PE6, PA2, PC5. 11. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when exiting the Shutdown mode. Table 4. STM32L475 modes overview (continued) Mode Regulator (1) CPU Flash SRAM Clocks DMA & Peripherals(2) Wakeup source Consumption(3) Wakeup time |
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