STM32L475VC datasheet(49/193 Pages) STMICROELECTRONICS

部件名	STM32L475VC

功能描述	Ultra-low-power ARM Cortex-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 128 KB SRAM, USB OTG FS, analog, audio

PDF	193 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

49 / 193 page

DocID027692 Rev 2

49/193

STM32L475xx

Functional overview

3.30

Single wire protocol master interface (SWPMI)

The Single wire protocol master interface (SWPMI) is the master interface corresponding to

the Contactless Frontend (CLF) defined in the ETSI TS 102 613 technical specification. The

main features are:

•

full-duplex communication mode

•

automatic SWP bus state management (active, suspend, resume)

•

configurable bitrate up to 2 Mbit/s

•

automatic SOF, EOF and CRC handling

SWPMI can be served by the DMA controller.

3.31

Controller area network (CAN)

The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It

can receive and transmit standard frames with 11-bit identifiers as well as extended frames

with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and

14 scalable filter banks.

The CAN peripheral supports:

•

Supports CAN protocol version 2.0 A, B Active

•

Bit rates up to 1 Mbit/s

Table 13. SAI implementation

SAI features(1)

1. X: supported

SAI1

SAI2

I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97

Mute mode

Stereo/Mono audio frame capability.

16 slots

Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit

FIFO Size

X (8 Word)

SPDIF

STM32L475VC 数据表(PDF) 49 Page - STMicroelectronics

STM32L475VC 数据表(HTML) 49 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载