STM32L475VC datasheet(16/193 Pages) STMICROELECTRONICS

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Functional overview

STM32L475xx

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DocID027692 Rev 2

3.4

Embedded Flash memory

STM32L475xx devices feature up to 1 Mbyte of embedded Flash memory available for

storing programs and data. The Flash memory is divided into two banks allowing read-

while-write operations. This feature allows to perform a read operation from one bank while

an erase or program operation is performed to the other bank. The dual bank boot is also

supported. Each bank contains 256 pages of 2 Kbyte.

Flexible protections can be configured thanks to option bytes:

•

Readout protection (RDP) to protect the whole memory. Three levels are available:

–

Level 0: no readout protection

–

Level 1: memory readout protection: the Flash memory cannot be read from or

written to if either debug features are connected, boot in RAM or bootloader is

selected

–

Level 2: chip readout protection: debug features (Cortex-M4 JTAG and serial

wire), boot in RAM and bootloader selection are disabled (JTAG fuse). This

selection is irreversible.

•

Write protection (WRP): the protected area is protected against erasing and

programming. Two areas per bank can be selected, with 2-Kbyte granularity.

•

Proprietary code readout protection (PCROP): a part of the flash memory can be

protected against read and write from third parties. The protected area is execute-only:

it can only be reached by the STM32 CPU, as an instruction code, while all other

accesses (DMA, debug and CPU data read, write and erase) are strictly prohibited.

One area per bank can be selected, with 64-bit granularity. An additional option bit

(PCROP_RDP) allows to select if the PCROP area is erased or not when the RDP

protection is changed from Level 1 to Level 0.

Table 3. Access status versus readout protection level and execution modes

Area

Protection

level

User execution

Debug, boot from RAM or boot

from system memory (loader)

Read

Write

Erase

Read

Write

Erase

Main

memory

Yes

N/A

System

memory

Yes

N/A

Option

bytes

Yes

N/A

Backup

registers

1Yes

Yes

N/A(1)

1. Erased when RDP change from Level 1 to Level 0.

N/A(1)

Yes

N/A

SRAM2

Yes

Yes(1)

No(1)

Yes

N/A

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