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STM32F413XG 数据表(PDF) 156 Page - STMicroelectronics |
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STM32F413XG 数据表(HTML) 156 Page - STMicroelectronics |
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156 / 207 page  Electrical characteristics STM32F413xG/H 156/207 DocID029162 Rev 2 twh(CKIN) twl(CKIN) Input clock high and low time SPI mode (SITP[1:0] = 01), External clock mode (SPICKSEL[1:0] = 0) 1.71 < VDD < 3.6 V tCKIN / 2 - 0.5 tCKIN / 2 - ns tsu Data input setup time SPI mode (SITP[1:0]=01), External clock mode (SPICKSEL[1:0] = 0) 1.71 < VDD < 3.6 V 3.5 - - th Data input hold time SPI mode (SITP[1:0]=01), External clock mode (SPICKSEL[1:0] = 0) 1.71 < VDD < 3.6 V 2.5 - - TManchester Manchester data period (recovered clock period) Manchester mode (SITP[1:0] = 10 or 11), Internal clock mode (SPICKSEL[1:0] ≠ 0) 1.71 < VDD < 3.6 V (CKOUTDIV + 1) * tDFBDMCLK - (2 * CKOUTDIV ) * tDFBDMCLK 1. Data based on characterization results. Table 86. DFSDM characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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