ADE7754 datasheet(32/44 Pages) AD

32 / 44 page

REV. PrG 01/03

PRELIMINARY TECHNICAL DATA

ADE7754

– 32 –

SCLK

DIN

A4 A3 A2

A1 A0

DB7

Most Significant Byte

t2 t3

DB0

DB7

DB0

Least Significant Byte

Command Byte

Figure 42– Serial Interface Write Timing Diagram

SCLK

XXXX

DB11 DB10

DB9

DB8

DIN

Most Significant Byte

DB3

DB2

DB1

DB0

DB7

DB6

DB5

DB4

Least Significant Byte

Figure 43—12 bit Serial Write Operation

ADE7754 Serial Read Operation

During a data read operation from the ADE7754 data is

shifted out at the DOUT logic output on the rising edge of

SCLK. As was the case with the data write operation, a data

read must be preceded with a write to the Communications

With the ADE7754 in communications mode and CS logic

low an eight bit write to the Communications register first

takes place. The MSB of this byte transfer must be a 0,

indicating that the next data transfer operation is a read. The

six LSBs of this byte contain the address of the register which

is to be read. The ADE7754 starts shifting out of the register

data on the next rising edge of SCLK – see Figure 44. At this

point the DOUT logic output switches from high impedance

state and starts driving the data bus. All remaining bits of

edges. The serial interface enters communications mode

again as soon as the read has been completed. The DOUT

logic output enters a high impedance state on the falling edge

of the last SCLK pulse. The read operation may be aborted

by bringing the CS logic input high before the data transfer

is completed. The DOUT output enters a high impedance

state on the rising edge of CS.

When an ADE7754 register is addressed for a read operation,

the entire contents of that register are transferred to the Serial

port. This allows the ADE7754 to modify its on-chip

registers without the risk of corrupting data during a multi

byte transfer.

Note: when a read operation follows a write operation, the

read command (i.e., write to communications register)

should not happen for at least TBD after the end of the write

operation. If the read command is sent within TBD of the

write operation, the last byte of the write operation may be

lost. The is given as timing specification t15.

SCLK

DIN

A4 A3 A2

A1 A0

t11

t12

DB7

DOUT

t13

DB0

DB7

t10

t14

Most Significant

Byte

Least Significant

Byte

Command

Byte

Figure 44– Serial Interface Read Timing Diagram

ADE7754 数据表(PDF) 32 Page - Analog Devices

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ADE7754 数据表(PDF) 32 Page - Analog Devices

ADE7754 数据表(HTML) 32 Page - Analog Devices

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