WM8281ECSSLASHR datasheet(49/392 Pages) CIRRUS

49 / 392 page

WM8281

Rev 4.0

Note that the WM8281 provides integrated pull-down resistors on the DMICDAT1, DMICDAT2,

DMICDAT3 and DMICDAT4 pins. This provides a flexible capability for interfacing with other devices.

Digital Mic

MICVDD or

MICBIASn

AGND

Digital Mic

VDD

CLK

DATA

VDD

CLK

DATA

CHAN

VDD

DMICDATn

DMICCLKn

Digital

Microphone

Interface

Figure 20 Digital Microphone Input

Two digital microphone channels are interleaved on DMICDATn. The digital microphone interface

timing is illustrated in Figure 21. Each microphone must tri-state its data output when the other

microphone is transmitting.

DMICCLKn pin

DMICDATn pin

(Left & Right

channels interleaved)

Left Mic output

Right Mic output

hi-Z

Figure 21 Digital Microphone Interface Timing

When digital microphone input is enabled, the WM8281 outputs a clock signal on the applicable

DMICCLK pin(s). The DMICCLK frequency is selectable, as described in Table 1.

Note that SYSCLK must be present and enabled when using the Digital Microphone inputs; see

“Clocking and Sample Rates” for details of SYSCLK and the associated register control fields.

WM8281ECS/R 数据表(PDF) 49 Page - Cirrus Logic

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