P83C266BDR datasheet(53/92 Pages) PHILIPS

53 / 92 page

1999 Mar 10

Philips Semiconductors

Product speciﬁcation

Microcontrollers for PAL/SECAM TV

with OSD and VST

P8xCx66 family

17.3.5

OSD START REGISTER (OSSTART)

Table 58 OSD Start Register (SFR address C5H)

Table 59 Description of OSSTART bits

17.3.6

OSD CONTROL REGISTER 2 (OSCON2)

Table 60 OS Control Register 2 (SFR address CFH)

Table 61 Description of OSCON2 bits

76543210

START7

START6

START5

START4

START3

START2

START1

START0

BIT

SYMBOL

DESCRIPTION

7START7

RAM start address. These 7 bits specify the display RAM address from which the first

character will be fetched. The display RAM address is from 0 to 191 decimal, or

00 to BF hexadecimal.

6START6

5START5

4START4

3START3

2START2

1START1

0START0

76543210

−−−

TCEN

−

BIT

SYMBOL

DESCRIPTION

−

These 3 bits are reserved.

−

TCEN

Test Code Enable. When TCEN = 1, the content of the space from character ROM is

displayed. This is valid for Space 1 and Space 2. The default value of TCEN is a logic 0.

This feature is for testing purposes only.

Background colour selection. These 3 bits select the background colour of the

TV screen in the Frame mode. The default background colour is blue.

−

This bit is reserved.

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