Data Sheet

ADP5090

Rev. C | Page 17 of 21

CBP Capacitor

The operation of the MPPT pin depends on the sampled value

of the OCV. The VIN pin is regulated to the voltage stored on

the CBP capacitor. This capacitor is sensitive to leakage because

the holding period is around 19 sec. As the capacitor voltage

drops due to leakage, the VIN regulation voltage also drops and

influences the effectiveness of MPPT. When the IC junction

temperature exceeds 85°C, the leakage current of the CBP pin

significantly increases so that a larger capacitance is beneficial

to the effectiveness of the MPPT. It is recommended to keep the

same RC time constant of the MPPT resistors and CBP

capacitor (up to 220 nF) as the typical application circuit in

Figure 33. Considering the time constant of the MPPT resistor

divider and the CBP capacitor, a low leakage X7R or C0G 10 nF

ceramic capacitor is recommended.

LAYOUT AND ASSEMBLY CONSIDERATIONS

Carefully consider the printed circuit board (PCB) layout

during the design of the switching power supply, especially at

high peak currents and high switching frequency. Therefore, it

is recommended to use wide and short traces for the main

power path and the power ground paths. Place the input

capacitors, output capacitors, inductor, and storage elements as

close as possible to the IC. It is most important for the boost

regulator to minimize the power path from output to ground.

Therefore, place the output capacitor as close as possible

between the SYS pin and the PGND pin. Keep a minimum

power path from the input capacitor to the inductor from the

VIN pin to the PGND pin. Place the input capacitor as close as

possible between the VIN pin and the PGND pin, and place the

inductor close to the VIN pin and the SW pin. It is best to use

vias and bottom traces for connecting the inductors to their

respective pins. To minimize noise pickup by the high

impedance threshold setting nodes (REF, TERM, SETSD, and

SETPG), place the external resistors close to the IC with short

traces.

The CBP capacitor must hold the MPPT voltage for 19 sec, as

any leakage can degrade the MPPT effectiveness. During board

assembly and cleaning, contaminants such as solder flux and

residue may form parasitic resistance to ground, especially in

humid environments with fast airflow. This can significantly

degrade the voltage regulation and change threshold levels set

by the external resistors. Therefore, it is recommended that no

ground planes be poured near the CBP capacitor or the

threshold setting resistors. In addition, the boards must be

carefully cleaned. If possible, clean ionic contamination with

deionized water for the CBP capacitor and the threshold setting

resistors.