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DA14581 数据表(PDF) 104 Page - Dialog Semiconductor

部件名 DA14581
功能描述  Bluetooth Low Energy 4.2 SoC with Optimized Boot Time
PDF  153 Pages
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制造商  DIALOG [Dialog Semiconductor]
网页  http://www.dialog-semiconductor.com/
标志 DIALOG - Dialog Semiconductor

DA14581 数据表(HTML) 104 Page - Dialog Semiconductor

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Datasheet
Revision 3.2
17-Jan-2017
CFR0011-120-01
104 of 153
© 2014 Dialog Semiconductor
DA14581
Bluetooth Low Energy 4.2 SoC with Optimized Boot Time
FINAL
Table 150: I2C_CLR_RX_DONE_REG (0x50001358)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0
0
r
CLR_RX_DONE
Read this register to clear the RX_DONE interrupt (bit 7) of
the
I2C_RAW_INTR_STAT register.
0x0
Table 151: I2C_CLR_ACTIVITY_REG (0x5000135C)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0
0
r
CLR_ACTIVITY
Reading this register clears the ACTIVITY interrupt if the I2C
is not active anymore. If the I2C module is still active on the
bus, the ACTIVITY interrupt bit continues to be set. It is auto-
matically cleared by hardware if the module is disabled and if
there is no further activity on the bus. The value read from
this register to get status of the ACTIVITY interrupt (bit 8) of
the IC_RAW_INTR_STAT register
0x0
Table 152: I2C_CLR_STOP_DET_REG (0x50001360)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0
0
r
CLR_ACTIVITY
Reading this register clears the ACTIVITY interrupt if the I2C
is not active anymore. If the I2C module is still active on the
bus, the ACTIVITY interrupt bit continues to be set. It is auto-
matically cleared by hardware if the module is disabled and if
there is no further activity on the bus. The value read from
this register to get status of the ACTIVITY interrupt (bit 8) of
the IC_RAW_INTR_STAT register.
0x0
Table 153: I2C_CLR_START_DET_REG (0x50001364)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0
0
r
CLR_START_DET
Read this register to clear the START_DET interrupt (bit 10)
of the IC_RAW_INTR_STAT register.
0x0
Table 154: I2C_CLR_GEN_CALL_REG (0x50001368)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0
0
r
CLR_GEN_CALL
Read this register to clear the GEN_CALL interrupt (bit 11) of
I2C_RAW_INTR_STAT register.
0x0
Table 155: I2C_ENABLE_REG (0x5000136C)
Bit
Mode
Symbol
Description
Reset
15:1
-
-
Reserved
0x0



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