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FT260Q-R 数据表(PDF) 18 Page - Future Technology Devices International Ltd. |
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FT260Q-R 数据表(HTML) 18 Page - Future Technology Devices International Ltd. |
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18 / 61 page ![]() Copyright © Future Technology Devices International Limited 18 FT260 HID-CLASS USB TO UART/I2C BRIDGE IC Version 1.1 Document No.: FT_001272 Clearance No.: FTDI#484 5.2 I2C Bus Interface I2C (Inter Integrated Circuit) is a multi-master serial bus invented by Philips. I2C uses two bi-directional open-drain wires called serial data (SDA) and serial clock (SCL). Common I²C bus speeds are standard mode (SM) with a bit rate up to 100 Kbit/s, fast mode (FM) with a bit rate up to 400 Kbit/s, Fast mode plus (FM+) with a bit rate up to 1 Mbit/s, and High Speed mode (HS) with the bit rate up to 3.4 Mbit/s. An I2C bus node can operate either as a master or a slave: Master node – issues the clock and addresses slaves Slave node – receives the clock line and address. The FT260 operates as an I2C master and is capable of being set to the speed modes defined in the I2C bus specification. Besides the speed mode defined in the I2C standard specification, the I2C controller of the FT260 can support flexible SCL frequencies defined by the following function ������������ ���������������� = ������������������������������������ �������������������� ������������������������������������ ����∗(����+����) ���� = ���� �������� ����; ���� = ����, ����, ����, … … , ������������ When the target frequency is below 100 KHz or higher than 1MHz, M will be equal to 8; otherwise, M will be equal to 6. For example, to generate a 3MHz frequency on SCL, M will be selected as 8. With the operating clock frequency equal to 48MHz, the user can set N as 1. The SCL frequency of the I2C master mode for the FT260 can be set via USB commands. Details can be referenced in the FT260 Application Notes. 5.2.1 I2C Pin Definition The I2C function in the FT260 is an I2C master device. It is enabled by default when the FT260 is powered up and the operating speed on the I2C bus is designed as 60 KHz for connectivity to most of the external I2C slave devices. The I2C pins of the FT260 are Clock – SCL (DIO5, pin 12 @ WQFN28), as clock output with open-drain design Data – SDA (DIO6, pin 13 @ WQFN28), command/address/data transfer between master and slave with open-drain design 5.2.2 I2C Bus Protocol There are four potential modes of operation for a given bus device, although most devices only use a single role (Master or Slave) and its two modes (Transmit and Receive): Master transmit – sending data to a slave Master receive – receiving data from a slave Slave transmit – sending data to a master Slave receive – receiving data from the master |
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