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STGAP1S 数据表(PDF) 12 Page - STMicroelectronics

部件名 STGAP1S
功能描述  gapDRIVE™: galvanically isolated single gate driver
PDF  67 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STGAP1S 数据表(HTML) 12 Page - STMicroelectronics

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Electrical data
STGAP1S
12/67
DocID027190 Rev 3
3.2
Thermal data
3.3
Recommended operating conditions
Table 3. Thermal data
Symbol
Parameter
Value
Unit
Rth(JA) Thermal resistance junction to ambient(1)
65
°C/W
1. The STGAP1S mounted on the EVALSTGAP1S rev 2.0 board (two-layer FR4 PCB).
Table 4. Recommended operating conditions
Symbol
Pin
Parameter
Test
condition
Min.
Max.
Unit
VH
17
Positive supply voltage
(VH vs. GNDISO)
4.50(1)
36
V
VL
14, 23
Negative supply voltage
(VL vs. GNDISO)
GNDISO - 10
GNDISO(2)
V
VHL
Differential supply voltage
(VH vs. VL)
36
V
VDD
7
Integrated 3.3 V voltage regulator
input voltage vs. GND
4.50
5.50
V
VREG
6
Internal logic supply voltage vs. GND
(3)
33.60
V
VLOGIC
2, 3, 4, 5,
8, 9, 11
Logic pins voltage vs. GND
(VDD, 5)min
V
ASC
24
ASC pin voltage
GNDISO
(VH, 15)min
V
VDESATth
18
Desaturation protection threshold
DESAT
enabled
VH - 1.50
V
fSW
Maximum switching frequency(4)
1MHz
1. When UVLO is enabled this value is VHon,max.
2. When UVLO is enabled this value is VLon,min.
3. When VDD is connected to the VREG pin (refer to Section 6 on page 22).
4. Actual limit depends on power dissipation constraints.



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