STGAP1S datasheet(36/67 Pages) STMICROELECTRONICS

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Functional description

STGAP1S

36/67

DocID027190 Rev 3

Selected failures force the device in “safe state”; the device remains in this state until the

relative status flags are released. Refer to Table 48 on page 58, Table 50 on page 59 and

Table 52 on page 60 for details.

The possibility to clear status registers by setting the SD low allows operating the device

also without using the SPI interface. In order to avoid an unintended clear of fault conditions

it is recommended to disable this functionality by setting the SD_FLAG = '0'.

7.12

Asynchronous stop command

The ASC pin allows to turn-on the GON output acting directly on the isolated driver logic and

regardless of the status of the input pins IN+, IN- and SD. This pin is active high.

The status of this pin is mirrored in the ASC bit present in the STATUS2 register.

The power supply of the isolated section must be present (VH > VHon).

In case UVLO on VH is not enabled, ASC function works for VH values within the

recommended operating values.

This function works even if the VDD voltage is not available or is in UVLO condition.

The priority of such command is lower than that of DESAT and SENSE pins, so the ASC

command is ignored in case of a desaturation or overcurrent fault. After such events the

gate can be turned on again with a low-to-high transition of the ASC pin, or by clearing the

fault condition (see Section 7.11).

7.13

Watchdog

The isolated side provides a watchdog function in order to identify when it is no more able to

communicate with the LV side. In this case the driver is automatically forced in “safe state”

and the REGERRR flag is set.

When the LV side is in the standby mode, turned off or in hardware reset condition, the

isolated side watchdog is still operative and the REGERRR flag is set.

The low voltage side provides a watchdog function in order to identify when it is no more

able to communicate with the isolated side. In this case the REGERRL flag is set and the

device is forced in “safe state”.

7.14

Security check functions

The device allows verifying the gate and sense resistor connections and the functionality of

SENSE and DESAT. This can be achieved through the following security checks:



GON to gate path



GOFF to gate path



SENSE comparator



SENSE resistor



DESAT comparator

The check modes are enabled through a dedicated configuration register TEST1 (refer to

Section 9.2.9 on page 60) and thus require entering in configuration mode.

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