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STGAP1S 数据表(PDF) 45 Page - STMicroelectronics |
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STGAP1S 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 67 page ![]() DocID027190 Rev 3 45/67 STGAP1S SPI interface 67 CRC protection All the command and data bytes have to be followed by a CRC code. If the CRC_SPI bit is set high, this code is used to check the data byte is correct, otherwise the CRC byte is ignored. In this case the CRC byte must be transmitted by the host, but its value is unimportant. A failure on the CRC check causes the respective data byte is ignored and the SPI_ERR flag is set high. The polynomial generator of the CRC code is X8 + X2 + X + 1 corresponding to the block diagram in Figure 23. Figure 23. Block diagram of the CRC generator The host must transmit to the device the inverted CRC code computed using the following procedure: Initialize CRC to all 1 Start the calculation from the most significant bit of the message Invert the CRC result In case of a WriteReg command, the CRC of the data byte (i.e.: the new register value) must be calculated initializing the computation system to the CRC of the command byte (i.e.: the CRC is calculated on a 16-bit message composed by the command + data byte). This way a data byte cannot be accepted as a command byte and vice-versa. Some examples are listed in Table 11. The device always transmits a response byte followed by a CRC computed using the same polynomial generator (X8 + X2 + X + 1). The CRC byte transmitted by the device is not inverted. If no response is required, the word returned by the device has no meaning and it should be discarded. Some examples are listed in Table 12. X0 X1 X2 X3 X4 X5 X6 X7 Message (from MSb to LSb) Table 11. CRC byte examples (from host to device) Command Command byte Command CRC Data byte Data CRC StopConfig 0x3A 0xAA N.A. N.A. WriteReg(CFG1, 0x20) 0x8C 0xA1 0x20 0x82 WriteReg(CFG5, 0x06) 0x99 0xCA 0x06 0x66 ResetStatus 0xD0 0x32 N.A. N.A. ReadReg(CFG3) 0xBE 0x3F N.A. N.A. |
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