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STGAP1S 数据表(PDF) 35 Page - STMicroelectronics

部件名 STGAP1S
功能描述  gapDRIVE™: galvanically isolated single gate driver
PDF  67 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STGAP1S 数据表(HTML) 35 Page - STMicroelectronics

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STGAP1S
Functional description
67
This configuration overrides some drawbacks of using the 2LTO at each turn-off, such as
the minimum pulse width equal to t2LTOtime and the turn-on delay needed to avoid duty cycle
distortion.
With this configuration the turn-off is only slowed down in case of desaturation or
overcurrent events.
Figure 16. Example of operation with 2LTO in “Fault” mode
7.10.3
Never
The 2LTO function is disabled (2LTOtime = 0x0). In this case a standard turn-off sequence is
used (directly lowering the gate voltage from VH to VL) also in case of desaturation or sense
overcurrent events.
7.11
Failure management
The device provides advanced diagnostic through open drain outputs (DIAG1/DIAG2) and
internal status registers. The DIAG2 output shares the same pin of the IN- input (see
Figure 1 on page 8); the diagnostic signal through the pin is enabled through the DIAG_EN
pin as described in Section 7.1 on page 25.
Status registers (STATUS1, STATUS2 and STATUS3) provide failures and status
information as listed in respective paragraphs.
DIAG1 and DIAG2 pins can be programmed through the dedicated registers (DIAG1 and
DIAG2) to signal one or more failure conditions. The output value is the result of the NOR of
the selected status bits: if one of the selected bits is high, the output is forced low.
Some of the failure conditions reported by the status registers are latched, i.e.: the flag is
kept high even if the triggering condition is expired. In this case the failure flag can be
released in following ways:
Using the ResetStatus command (all flags are released)
Forcing low the SD pin for at least trelease when the SD_FLAG configuration bit is set
high. All the flags are released at the SD rising edge.
Using HW reset (see Section 7.3 on page 29). In this case the device behaves as after
power-up sequence.
In any case, if the failure condition is still present, the respective flag is not released.
tDon
t2LTOtime
tDoff
tDESAT
INAND
GON-GOFF
VDESATth
DESAT
tDoff
tDon



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