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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7MC1K2 数据表(PDF) 208 Page - STMicroelectronics |
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ST7MC1K2 数据表(HTML) 208 Page - STMicroelectronics |
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208 / 371 page  Obsolete Product(s) - Obsolete Product(s) On-chip peripherals ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto 208/371 Figure 88. Functional diagram of Z detection after D event Speed sensor mode This mode is entered whenever the tacho edge selection bits in the MPAR register are not both reset (TES[1:0] = 01, 10 or 11). The corresponding block diagram is shown in Figure 89. Either incremental encoder or tachogenerator-type speed sensor can be selected with the IS[1:0] bits in the MPHST register. Begin End DS or DH Change the side according to OS[2:0] Switch sampling clock[D] ->sampling clock[Z] Wait for next sampling clock edge Yes No Yes No Yes No Filter off ? Read enabled Z window filter turned on ZWF[3:0] bits in MZFR register Read enable by REO ? Side change on output PWM ? Obsolete Product(s) - Obsolete Product(s) |
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