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ST7MC1K2 数据表(PDF) 243 Page - STMicroelectronics |
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ST7MC1K2 数据表(HTML) 243 Page - STMicroelectronics |
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243 / 371 page  Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto On-chip peripherals 243/371 The multiplexer directs the PWM to the upper channel, the lower channel or both of them alternatively or simultaneously according to the peripheral state. This means that the PWM can affect any of the upper or lower channels allowing the selection of the most appropriate reference potential when free-wheeling the motor in order to: ● improve system efficiency ● speed up the demagnetization phase ● enable back EMF zero crossing detection The OS[2:0] bits in the MCRB register allow the PWM configuration to be configured for each case as shown in Figure 111 and Figure 110. During demagnetization, the OS2 bit is used to control PWM mode, and it is latched in a preload register so it can be modified when a commutation event occurs and the configuration is active immediately. The OS1 bit is used to control the PWM between the D and Z events to control back EMF detection. OS0 bit allows control of the PWM signal between the Z event and the next C event. Note: Demagnetization speed-up: During demagnetization the voltage on the winding has to be as high as possible in order to reduce the demagnetization time. Software can apply a different PWM configuration on the outputs between the C and D events, to force the free wheeling on the appropriate diodes to maximize the demagnetization voltage. Emergency feature When the NMCES pin goes low: ● The tristate output buffer is put in reset state asynchronously. ● The MOE bit in the MCRA register is reset. ● An interrupt request is sent to the CPU if the EIM bit in the MIMR register is set. This bit can be connected to an alarm signal from the drivers, thermal sensor or any other security component. This feature functions even if the MCU oscillator is off. Obsolete Product(s) - Obsolete Product(s) |
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