ST7MC1K2 datasheet(258/371 Pages) STMICROELECTRONICS

258 / 371 page

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Figure 123. Update rate examples depending on mode and MREP register setting

Timer resynchronization

The 12-bit timer can be resynchronized by a simple write access with FFh value in the MISR

preload registers MCP0, MCPU, MCPV, MCPW are transferred to the active registers.

To resynchronize the 12-bit timer properly, the following procedure must be applied:

Load the new values in the preload compare registers

Load FFh value in the MISR register (this resets the counter and transfers the compare

preload registers in the active registers: U event)

Reset the PUI flag by loading 7Fh in the MISR register. Refer to note 2 on page 291.

Note:

Loading FFh value in the MISR register has no effect on any flag other than the PUI flag and

generates a PWM update interrupt if the PUM bit is set.

Warning:

In switched mode (SWA bit is reset), the procedure is the

same and loading FFh in the MISR register has no effect on

any flags except those on the PUI flag. As a consequence, it

is recommended to avoid setting RMI and RPI flags at the

same time in switched mode because none of them are taken

into account.

Center-aligned mode

Edge-aligned mode

U event: preload registers transferred to active registers and PWM interrupt generated.

12-bit PWM counter

MREP = 0

MREP = 1

MREP = 2

MREP = 3

U event if transition from MREP = 0 to MREP = 1 occurs when 12-bit counter is equal to MCPO.

MREP = 3

and

resynchronization

(by SW)

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