STM8L151C4 datasheet(107/142 Pages) STMICROELECTRONICS

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STM8L151x4/6, STM8L152x4/6

Electrical parameters

115

In the following table, data is based on characterization results, not tested in production.

In the following table, data is guaranteed by design, not tested in production.

Table 51. DAC accuracy

Symbol

Parameter

Conditions

Typ

Max

Unit

DNL

Differential non linearity(1)

RL ≥5 kΩ, CL≤50 pF

DACOUT buffer ON(2)

1.5

12-bit

LSB

No load

DACOUT buffer OFF

1.5

INL

Integral non linearity(3)

RL ≥5 kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

No load

DACOUT buffer OFF

Offset

Offset error(4)

RL ≥5 kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

±10

±25

No load

DACOUT buffer OFF

±5

±8

Offset1

Offset error at Code 1 (5)

DACOUT buffer OFF

±1.5

±5

Gain error

Gain error(6)

RL ≥5 kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

+0.1/-0.2

+0.2/-0.5

No load

DACOUT buffer OFF

+0/-0.2

+0/-0.4

TUE

Total unadjusted error

RL ≥5 kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

12-bit

LSB

No load

DACOUT buffer OFF

812

1. Difference between two consecutive codes - 1 LSB.

2. For 48-pin packages only. For 28-pin and 32-pin packages, DAC output buffer must be kept off and no load must be

applied.

3. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 1023.

4. Difference between the value measured at Code (0x800) and the ideal value = VREF+/2.

5. Difference between the value measured at Code (0x001) and the ideal value.

6. Difference between the ideal slope of the transfer function and the measured slope computed from Code 0x000 and 0xFFF

when buffer is ON, and from Code giving 0.2 V and (VDDA -0.2) V when buffer is OFF.

Table 52. DAC output on PB4-PB5-PB6(1)

1. 32 or 28-pin packages only. The DAC channel can be routed either on PB4, PB5 or PB6 using the routing

interface I/O switch registers.

Symbol

Parameter

Conditions

Max

Unit

Rint

Internal resistance

between DAC output and

PB4-PB5-PB6 output

2.7 V < VDD < 3.6 V

1.4

2.4 V < VDD < 3.6 V

1.6

2.0 V < VDD < 3.6 V

3.2

1.8 V < VDD < 3.6 V

8.2

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