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STM32F401CD 数据表(PDF) 60 Page - STMicroelectronics |
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STM32F401CD 数据表(HTML) 60 Page - STMicroelectronics |
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60 / 135 page ![]() Electrical characteristics STM32F401xD STM32F401xE 60/135 6.3 Operating conditions 6.3.1 General operating conditions Table 14. General operating conditions Symbol Parameter Conditions Min Typ Max Unit fHCLK Internal AHB clock frequency Power Scale3: Regulator ON, VOS[1:0] bits in PWR_CR register = 0x01 0- 60 MHz Power Scale2: Regulator ON, VOS[1:0] bits in PWR_CR register = 0x10 0 - 84 fPCLK1 Internal APB1 clock frequency 0 - 42 fPCLK2 Internal APB2 clock frequency 0 - 84 VDD Standard operating voltage 1.7(1) -3.6 V VDDA (2)(3) Analog operating voltage (ADC limited to 1.2 M samples) Must be the same potential as VDD(4) 1.7(1) -2.4 Analog operating voltage (ADC limited to 2.4 M samples) 2.4 - 3.6 VBAT Backup operating voltage 1.65 - 3.6 V12 Regulator ON: 1.2 V internal voltage on VCAP_1/VCAP_2 pins VOS[1:0] bits in PWR_CR register = 0x01 Max frequency 60 MHz 1.08(5) 1.14 1.20(5) VOS[1:0] bits in PWR_CR register = 0x10 Max frequency 84 MHz 1.20(5) 1.26 1.32(5) V12 Regulator OFF: 1.2 V external voltage must be supplied on VCAP_1/VCAP_2 pins Max. frequency 60 MHz. 1.1 1.14 1.2 Max. frequency 84 MHz. 1.2 1.26 1.32 VIN Input voltage on RST and FT pins(6) 2 V ≤ VDD ≤ 3.6 V –0.3 - 5.5 VDD ≤ 2 V –0.3 - 5.2 Input voltage on BOOT0 pin 0 - 9 PD Maximum allowed package power dissipation for suffix 7(7) UFQFPN48 - - 625 mW WLCSP49 - - 392 LQFP64 - - 313 LQFP100 - - 465 UFBGA100 - - 323 |
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