STM32F769AI datasheet(30/255 Pages) STMICROELECTRONICS

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Functional overview

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DocID029041 Rev 4

option bytes. The device remains in reset mode when VDD is below a specified threshold,

VPOR/PDR or VBOR, without the need for an external reset circuit.

The device also features an embedded programmable voltage detector (PVD) that monitors

the VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be

generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is

higher than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

2.18.2

Internal reset OFF

This feature is available only on packages featuring the PDR_ON pin. The internal power-on

reset (POR) / power-down reset (PDR) circuitry is disabled through the PDR_ON pin.

An external power supply supervisor should monitor VDD and NRST and should maintain

the device in reset mode as long as VDD is below a specified threshold. PDR_ON should be

connected to VSS. Refer to Figure 6: Power supply supervisor interconnection with internal

reset OFF.

Figure 6. Power supply supervisor interconnection with internal reset OFF

The VDD specified threshold, below which the device must be maintained under reset, is

1.7 V (see Figure 7).

A comprehensive set of power-saving mode allows to design low-power applications.

When the internal reset is OFF, the following integrated features are no more supported:

•

The integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled

•

The brownout reset (BOR) circuitry must be disabled

•

The embedded programmable voltage detector (PVD) is disabled

•

VBAT functionality is no more available and VBAT pin should be connected to VDD.

All the packages, except for the LQFP100, allow to disable the internal reset through the

PDR_ON signal when connected to VSS.

STM32F769AI 数据表(PDF) 30 Page - STMicroelectronics