STM32F769AI datasheet(37/255 Pages) STMICROELECTRONICS

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DocID029041 Rev 4

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Functional overview

Standby mode, the SRAM and register contents are lost except for registers in the

backup domain and the backup SRAM when selected.

The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,

a rising or falling edge on one of the 6 WKUP pins (PA0, PA2, PC1, PC13, PI8, PI11),

or an RTC alarm / wakeup / tamper /time stamp event occurs.

The Standby mode is not supported when the embedded voltage regulator is bypassed

and the 1.2 V domain is controlled by an external power.

2.22

VBAT operation

The VBAT pin allows to power the device VBAT domain from an external battery, an external

supercapacitor, or from VDD when no external battery and an external supercapacitor are

present.

VBAT operation is activated when VDD is not present.

The VBAT pin supplies the RTC, the backup registers and the backup SRAM.

Note:

When the microcontroller is supplied from VBAT, external interrupts and RTC alarm/events

do not exit it from VBAT operation.

When the PDR_ON pin is connected to VSS (Internal Reset OFF), the VBAT functionality is

no more available and the VBAT pin should be connected to VDD.

2.23

Timers and watchdogs

The devices include two advanced-control timers, eight general-purpose timers, two basic

timers and two watchdog timers.

All timer counters can be frozen in debug mode.

Table 6 compares the features of the advanced-control, general-purpose and basic timers.

STM32F769AI 数据表(PDF) 37 Page - STMicroelectronics