LP3906 datasheet(33/38 Pages) NSC

33 / 38 page

Application Notes (Continued)

high frequency noise. The ESR of a typical 1.0 µF ceramic

capacitor is in the range of 20 m

Ω to 40 mΩ, which easily

meets the ESR requirement for stability for the LDOs.

For both input and output capacitors, careful interpretation of

the capacitor specification is required to ensure correct de-

vice operation. The capacitor value can change greatly, de-

pending on the operating conditions and capacitor type.

In particular, the output capacitor selection should take ac-

count of all the capacitor parameters, to ensure that the

specification is met within the application. The capacitance

can vary with DC bias conditions as well as temperature and

frequency of operation. Capacitor values will also show

some decrease over time due to aging. The capacitor pa-

rameters are also dependent on the particular case size,

with smaller sizes giving poorer performance figures in gen-

eral. As an example, the graph below shows a typical graph

comparing different capacitor case sizes in a Capacitance

vs. DC Bias plot.

20197828

Graph Showing a Typical Variation in Capacitance vs.

DC Bias

As shown in the graph, increasing the DC Bias condition can

result in the capacitance value that falls below the minimum

value given in the recommended capacitor specifications

table. Note that the graph shows the capacitance out of spec

for the 0402 case size capacitor at higher bias voltages. It is

therefore recommended that the capacitor manufacturers’

specifications for the nominal value capacitor are consulted

for all conditions, as some capacitor sizes (e.g. 0402) may

not be suitable in the actual application.

The ceramic capacitor’s capacitance can vary with tempera-

ture. The capacitor type X7R, which operates over a tem-

perature range of −55˚C to +125˚C, will only vary the capaci-

tance to within ±15%. The capacitor type X5R has a similar

tolerance over a reduced temperature range of −55˚C to

+85˚C. Many large value ceramic capacitors, larger than

1 µF are manufactured with Z5U or Y5V temperature char-

acteristics. Their capacitance can drop by more than 50% as

the temperature varies from 25˚C to 85˚C. Therefore X7R is

recommended over Z5U and Y5V in applications where the

ambient temperature will change significantly above or be-

low 25˚C.

Tantalum capacitors are less desirable than ceramic for use

as output capacitors because they are more expensive when

comparing equivalent capacitance and voltage ratings in the

0.47 µF to 4.7 µF range.

Another important consideration is that tantalum capacitors

have higher ESR values than equivalent size ceramics. This

means that while it may be possible to find a tantalum

capacitor with an ESR value within the stable range, it would

have to be larger in capacitance (which means bigger and

more costly) than a ceramic capacitor with the same ESR

value. It should also be noted that the ESR of a typical

tantalum will increase about 2:1 as the temperature goes

from 25˚C down to −40˚C, so some guard band must be

allowed.

Input Capacitor Selection for SW1 and SW2

A ceramic input capacitor of 10 µF, 6.3V is sufficient for the

magnetic dc/dc converters. Place the input capacitor as

close as possible to the input of the device. A large value

may be used for improved input voltage filtering. The recom-

mended capacitor types are X7R or X5R. Y5V type capaci-

tors should not be used. DC bias characteristics of ceramic

capacitors must be considered when selecting case sizes

like 0805 and 0603. The input filter capacitor supplies cur-

rent to the PFET switch of the dc/dc converter in the first half

of each cycle and reduces voltage ripple imposed on the

input power source. A ceramic capacitor’s low ESR (Equiva-

lent Series Resistance) provides the best noise filtering of

the input voltage spikes due to fast current transients. A

capacitor with sufficient ripple current rating should be se-

lected. The Input current ripple can be calculated as:

The worse case is when V

IN =2VOUT

Output Capacitor Selection for SW1, SW2

A 10 µF, 6.3V ceramic capacitor should be used on the

output of the sw1 and sw2 magnetic dc/dc converters. The

input capacitor needs to be mounted as close as possible to

the input of the device. A large value may be used for

improved input voltage filtering. The recommended capacitor

types are X7R or X5R. Y5V type capacitors should not be

used. DC bias characteristics of ceramic capacitors must be

considered when selecting case sizes like 0805 and 0603.

DC bias characteristics vary from manufacturer to manufac-

turer and DC bias curves should be requested from them

and analyzed as part of the capacitor selection process.

The output filter capacitor of the magnetic dc/dc converter

smoothes out current flow from the inductor to the load,

helps maintain a steady output voltage during transient load

changes and reduces output voltage ripple. These capaci-

tors must be selected with sufficient capacitance and suffi-

ciently low ESD to perform these functions.

The output voltage ripple is caused by the charging and

discharging of the output capacitor and also due to its ESR

and can be calculated as follows:

LP3906 数据表(PDF) 33 Page - National Semiconductor (TI)

LP3906 数据表(HTML) 33 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

数据表下载