IO Electrical Characteristics

Unless otherwise noted: Typical values and limits appearing in normal type apply for T

type apply over the entire junction temperature range for operation, T

Symbol

Parameter

Conditions

Limit

Units

Min

Max

V

IL

Input Low Level

0.4

V

V

IH

Input High Level

1.2

V

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of

the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the

Electrical Characteristics.

Note 2: All voltages are with respect to the potential at the GND pin.

140˚C (typ.)

Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. (MILSTD - 883 3015.7)

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be

Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,

special care must be paid to thermal dissipation issues in board design.

Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.

Note 9: The device maintains a stable, regulated output voltage without a load.

Note 10: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value.

Note 13: This specification is guaranteed by design.

Note 14: The Iq can be defined as the standing current of the LP3906 when the I2C bus is active and all other power blocks have been disabled via the I2C bus,

or it can be defined as the I2C bus active, and the other power blocks are active under no load condition. These two values can be used by the system designer

when the LP3906 is powered using a battery. If the user plans to use the HW enable pins to disable each block of the IC please contact the factory applications for

IQ details.

Note 15: Pins 13, 19 can operate from Vin min of 1.74 to a Vin max of 5.5V this rating is only for the series pass pmos power fet. It allows the system design to

use a lower voltage rating if the input voltage comes from a buck output.

Note 16: The Iq exhibits a higher current draw when the EN pin is de-asserted because the I2C buffer pins draw an additional 2µA

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