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数据搜索系统，热门电子元器件搜索 |
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SPEAR600 数据表(PDF) 58 Page - STMicroelectronics |
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SPEAR600 数据表(HTML) 58 Page - STMicroelectronics |
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58 / 97 page  Electrical characteristics SPEAr600 58/97 Doc ID 16259 Rev 3 5.7 Power up sequence No particular sequence is required. It is only required that the various power supplies reach the correct range in less than 10 msec. 5.8 Power on reset (MRESET) The MRESET must remain active for at least 10 ms after all the power supplies are in the correct range and should become active in no more than 10 µs when one of the power supplies goes out of the correct range. Figure 3. Power on reset timing diagram Table 28. On die termination Symbol Parameter Min. Typ. Max Unit RT1* Termination value of resistance for on die termination 75 Ω RT2* Termination value of resistance for on die termination 150 Ω Table 29. Reference voltage Symbol Parameter Min. Typ. Max Unit VREFIN Voltage applied to core/pad 0.49 * VDDE 0.500 * VDDE 0.51 * VDDE V 2.95 us MRESET resets_o sclk npor_o hresetn pll_lock 17 sclk clock cycles (at 30MHz) All Vdd are stable OSCI 30MHz synch synch 60 clock cycles synch Pll lock time (note 2) DOZE MODE NORMAL MODE arm_fetching 10 ms |
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