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SPEAR600 数据表(PDF) 68 Page - STMicroelectronics |
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SPEAR600 数据表(HTML) 68 Page - STMicroelectronics |
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68 / 97 page ![]() Timing characteristics SPEAr600 68/97 Doc ID 16259 Rev 3 Input path: tSETUP = tSETUP_FF + tIN(max) + tCK_PAD(max) - tCK_FF tHOLD = tHOLD_FF - tIN(min) - tCK_PAD(min) + tCK_FF Output Path: tmax = (tOUT + tCK_FF)(max) - tCK_PAD(min) tmin = (tOUT + tCK_FF)(min) - tCK_PAD(max) Note: For tSETUP, tHOLD and tmax are taken the maximum value from worst case and best case, while the minimum value is taken for tmin. 6.2.2 Pad delay enabled Figure 13. EXPI pad delay enabled block diagram Note: The pad of the clock is disabled or enabled using the expi_clk_retim bit in the EXPI_CLK_CFG register. Refer to the MISC registers chapter of the user manual). HSIZE,HWRITE, HBURST, HTRANS, HLOCK, HBUSREQ, 7.02 -1.94 HWDATA 6.17 -1.94 Output tmin(ns) tmax(ns) HGRANT, HReady_mst(43), HRESP -0.66 4.21 HRDATA -1.09 7.34 Table 39. SOC-slave (continued) Input Q Q SET CL R D tout tck_pad CLK PL_GPIO[x] tin Q Q SET CL R D PL_CLK1 tck_ff |
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