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SPEAR600 数据表(PDF) 88 Page - STMicroelectronics |
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SPEAR600 数据表(HTML) 88 Page - STMicroelectronics |
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88 / 97 page ![]() Timing characteristics SPEAr600 88/97 Doc ID 16259 Rev 3 Figure 44. SPI master mode external timing (CPHA = 0) 6.8.2 SPI master mode timings (CPHA = 1) 19 Delay time, SSP_SS (output) falling edge to first SSP_SCLK (output) rising or falling edge Tns 20 Delay time, SSP_SCLK (output) rising or falling edge to SSP_SS (output) rising edge T/2 ns Table 58. Timing requirements for SPI mode on MOSI pad [CPHA = 0] (continued) No parameters CPOL SPI1 SPI2 SPI3 unit Table 59. Timing requirements for SPI mode on MISO pad [CPHA = 1] No parameters CPOL SPI1 SPI2 SPI3 unit 4 Setup time, MISO (input) valid before SSP_SCLK (output) falling edge 0 9.632 10.804 10.427 ns 5 Setup time, MISO (input) valid before SSP_SCLK (output) rising edge 1 9.563 10.759 10.357 ns |
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