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HT66F4530 数据表(PDF) 103 Page - Holtek Semiconductor Inc |
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HT66F4530 数据表(HTML) 103 Page - Holtek Semiconductor Inc |
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103 / 224 page ![]() Rev. 1.00 10� De�e��e� �1� �01� Rev. 1.00 103 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers Single Pulse Output Mode Toselectthismode,bitsSTnM1andSTnM0intheSTMnC1registershouldbesetto10 respectivelyandalsotheSTnIO1andSTnIO0bitsshouldbesetto11respectively.TheSinglePulse OutputMode,asthenamesuggests,willgenerateasingleshotpulseontheSTMnoutputpin. ThetriggerforthepulseoutputleadingedgeisalowtohightransitionoftheSTnONbit,which canbeimplementedusingtheapplicationprogram.HoweverintheSinglePulseOutputMode,the STnONbitcanalsobemadetoautomaticallychangefromlowtohighusingtheexternalSTCKn pin,whichwillinturninitiatetheSinglePulseoutput.WhentheSTnONbittransitionstoahigh level,thecounterwillstartrunningandthepulseleadingedgewillbegenerated.TheSTnONbit shouldremainhighwhenthepulseisinitsactivestate.Thegeneratedpulsetrailingedgewillbe generatedwhentheSTnONbitisclearedtozero,whichcanbeimplementedusingtheapplication programorwhenacomparematchoccursfromComparatorA. HoweveracomparematchfromComparatorAwillalsoautomaticallycleartheSTnONbitandthus generatetheSinglePulseoutputtrailingedge.InthiswaytheCCRAvaluecanbeusedtocontrol thepulsewidth.AcomparematchfromComparatorAwillalsogenerateaSTMninterrupt.The countercanonlyberesetbacktozerowhentheSTnONbitchangesfromlowtohighwhenthe counterrestarts.IntheSinglePulseOutputModeCCRPisnotused.TheSTnCCLRandSTnDPX bitsarenotusedinthisMode. STnON �it 0 1 S/W Co��and SET“STnON” o� STCKn Pin T�ansition STnON �it 1 0 CCRA T�ailing Edge S/W Co��and CLR“STnON” o� CCRA Co�pa�e Mat�h STPn Output Pin Pulse Width = CCRA Value CCRA Leading Edge Note:STCKnisnotavailableforHT66F4530. Single Pulse Generation (n=0 or 1) |
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